A Study of an Infrastructure for Research and Development of Many-Core Processors

被引：2
|
作者：
Uehara, Koh [1 ]
Sato, Shimpei [1 ]
Miyoshi, Takefumi [1 ]
Kise, Kenji [1 ]
机构：
[1] Tokyo Inst Technol, Grad Sch Informat Sci & Engn, Tokyo, Japan
来源：
2009 INTERNATIONAL CONFERENCE ON PARALLEL AND DISTRIBUTED COMPUTING, APPLICATIONS AND TECHNOLOGIES (PDCAT 2009) | 2009年
关键词：
D O I：
10.1109/PDCAT.2009.77
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Many-core processors which have thousands of cores on a chip will be realized. We developed an infrastructure which accelerates the research and development of such many-core processors. This paper describes three main elements provided by our infrastructure. The first element is the definition of simple many-core processor architecture called M-Core. The second is SimMc, a software simulator of M-Core. The third is the software library MClib which helps the development of application programs for M-Core. The simulation speed of SimMc and the parallelization efficiency of M-Core are evaluated using some benchmark programs. We show that our infrastructure accelerates the research and development of many-core processors.
引用
收藏
页码：414 / 419
页数：6
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