Fast and Pipelined Bit-Parallel Montgomery Multiplication and Squaring over GF(2m)

This paper presents an efficient implementation of a fast and pipelined Bit-parallel Montgomery multiplier and squaring over GF(2(m)) generated by irreducible trinomials. The architecture of the multiplier is based on a parallel and independent computation of multiplication by negative powers of x as polynomial variable in multiplication and squaring. The structure has a regular and low complex architecture with a low critical path. The critical path delay is decreased by using a 2-stage pipelining technique. The proposed method over the binary extension field GF(2(233)) has been successfully verified and synthesized using Xilinx ISE 11 by Virtex-4, XC4VLX100 FPGA. Maximum operation frequency of multiplier is 281.3 MHz.