Optimizing circuit performance and ESD protection for high-speed differential I/Os

被引：8

作者：

Sarbishaei, H. ^{[1
]}

Semenov, O. ^{[1
]}

Sachdev, M. ^{[1
]}

机构：

[1] Univ Waterloo, Dept Elect & Comp Engn, Waterloo, ON N2L 3G1, Canada

来源：

PROCEEDINGS OF THE IEEE 2007 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2007年

关键词：

D O I：

10.1109/CICC.2007.4405701

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Impact of ESD protection devices on circuit operation is very important in gigahertz applications. In this paper, the impact of different ESD protection methodologies on CML drivers is discussed. ESD protection is provided using MOSFET and SCR devices. Study of the interaction between driver and ESD protection circuit shows that jitter is very sensitive to parasitics of ESD protection circuits. Furthermore, an analysis shows that substrate- triggering has less impact on jitter compared to gate-coupling.

引用

页码：149 / 152

页数：4

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