Power estimation for large sequential circuits

被引：15
|
作者：
Kozhaya, JN
Najm, FN
机构：
[1] Univ Illinois, Dept Elect & Comp Engn, Urbana, IL 61801 USA
[2] Univ Toronto, Dept Elect & Comp Engn, Toronto, ON M5S 3G4, Canada
来源：
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS | 2001年 / 9卷 / 02期
关键词：
finite-state machine (FSM); power estimation; sequential circuit;
D O I：
10.1109/92.924063
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
A power estimation approach is presented in which blocks of consecutive vectors are selected at random from a user-supplied realistic input vector set and the circuit is simulated for each block starting from an unknown state. This leads to two (upper and lower) bounds on the desired power value which can be quite tight (under 10% difference between the two in many cases). As a result, the power dissipation is obtained by simulating only a fraction of the potentially very large vector set.
引用
收藏
页码：400 / 407
页数：8
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