共 50 条
- [32] Gate-All-Around Si-Nanowire Transistors: Simulation at Nanoscale [J]. PROCEEDINGS OF 2018 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES KOLKATA CONFERENCE (IEEE EDKCON), 2018, : 137 - 141
- [33] ESD Characterization of Gate-All-Around (GAA) Si Nanowire Devices [J]. 2015 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM), 2015,
- [34] Timing and Power Fluctuations on Gate-All-Around Nanowire CMOS Circuit Induced by Various Sources of Random Discrete Dopants [J]. 2017 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES (SISPAD 2017), 2017, : 61 - 64
- [35] Investigation of Gate All Around Junctionless Nanowire Transistor with Arbitrary Polygonal Cross Section [J]. 2018 4TH INTERNATIONAL CONFERENCE ON DEVICES, CIRCUITS AND SYSTEMS (ICDCS), 2018, : 159 - 163
- [36] Vertical Field effect transistor with sub-15nm gate-all-around on Si nanowire array [J]. ESSDERC 2015 PROCEEDINGS OF THE 45TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE, 2015, : 202 - 205