共 50 条
- [41] Low-complexity systolic multiplier over GF(2m) using weakly dual basis APCCAS 2002: ASIA-PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, VOL 1, PROCEEDINGS, 2002, : 367 - 372
- [42] Low Cost Dual-Basis Multiplier over GF(2m) Using Multiplexer Approach KNOWLEDGE DISCOVERY AND DATA MINING, 2012, 135 : 185 - +
- [44] Low Power Semi-systolic Architectures for Polynomial-Basis Multiplication over GF(2m) Using Progressive Multiplier Reduction JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2016, 82 (03): : 331 - 343
- [45] Low Power Semi-systolic Architectures for Polynomial-Basis Multiplication over GF(2m) Using Progressive Multiplier Reduction Journal of Signal Processing Systems, 2016, 82 : 331 - 343
- [46] A novel approach for multiplication over GF(2m) in Polynomial Basis representation ARES 2008: PROCEEDINGS OF THE THIRD INTERNATIONAL CONFERENCE ON AVAILABILITY, SECURITY AND RELIABILITY, 2008, : 1346 - 1351
- [50] Area efficient systolic Multiplier for GF(2m) PDPTA'2001: PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON PARALLEL AND DISTRIBUTED PROCESSING TECHNIQUES AND APPLICATIONS, 2001, : 687 - 691