MUCCRA-3: A LOW POWER DYNAMICALLY RECONFIGURABLE PROCESSOR ARRAY

被引：0
|
作者：
Saito, Yoshiki [1 ]
Sano, Toru [1 ]
Kato, Masaru [1 ]
Tunbunheng, Vasutan [1 ]
Yasuda, Yoshihiro [1 ]
Kimura, Masayuki [1 ]
Amano, Hideharu [1 ]
机构：
[1] Keio Univ, Dept Informat & Comp Sci, Kouhoku Ku, Yokohama, Kanagawa 2238522, Japan
来源：
2010 15TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC 2010) | 2010年
关键词：
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
引用
收藏
页码：372 / 373
页数：2
相关论文
共 50 条
  • [21] Low Power Encoding Techniques for Dynamically Reconfigurable Hardware
    Claudia Kretzschmar
    Robert Siegmund
    Dietmar Müller
    The Journal of Supercomputing, 2003, 26 : 185 - 203
  • [22] Low power encoding techniques for dynamically reconfigurable hardware
    Kretzschmar, C
    Siegmund, R
    Müller, D
    JOURNAL OF SUPERCOMPUTING, 2003, 26 (02): : 185 - 203
  • [23] A Restricted Dynamically Reconfigurable Architecture for Low Power Processors
    Hirao, Takeshi
    Kim, Dahoo
    Hida, Itaru
    Asai, Tetsuya
    Motomura, Masato
    2013 INTERNATIONAL CONFERENCE ON RECONFIGURABLE COMPUTING AND FPGAS (RECONFIG), 2013,
  • [24] Design and analysis of a dynamically reconfigurable network processor
    Troxel, IA
    George, AD
    Oral, S
    LCN 2002: 27TH ANNUAL IEEE CONFERENCE ON LOCAL COMPUTER NETWORKS, PROCEEDINGS, 2002, : 483 - 492
  • [25] An adaptive viterbi decoder on the dynamically reconfigurable processor
    Abe, Sbobei
    Hasegawa, Yohei
    Toi, Takao
    Inuo, Takeshi
    Amano, Hidebaru
    2006 IEEE INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE TECHNOLOGY, PROCEEDINGS, 2006, : 285 - 288
  • [26] A modeling of a dynamically reconfigurable processor using SystemC
    Kitamichi, Junji
    Ueda, Koji
    Kuroda, Kenichi
    21ST INTERNATIONAL CONFERENCE ON VLSI DESIGN: HELD JOINTLY WITH THE 7TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS, PROCEEDINGS, 2008, : 91 - +
  • [27] A dynamically reconfigurable SIMD processor for a vision chip
    Komuro, T
    Kagami, S
    Ishikawa, M
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2004, 39 (01) : 265 - 268
  • [28] Dynamically Reconfigurable Multi-Processor Arrays
    Glenn-Anderson, James
    CONFERENCE RECORD OF THE 2014 FORTY-EIGHTH ASILOMAR CONFERENCE ON SIGNALS, SYSTEMS & COMPUTERS, 2014, : 1858 - 1863
  • [29] Application of a dynamically reconfigurable cell-array processor to an MPEG-2 video decoder
    Komoku, K
    Hatano, F
    Morishita, T
    Teramoto, I
    RECONFIGURABLE TECHNOLOGY: FPGAS FOR COMPUTING AND APPLICATIONS II, 2000, 4212 : 42 - 49
  • [30] A novel low-power reconfigurable FFT processor
    Zhao, YT
    Erdogan, AT
    Arslan, T
    2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS, 2005, : 41 - 44
12345