Failure analysis of wafer using backside OBIC method

被引：5
|
作者：
Ito, S
Monma, H
机构：
[1] Fujitsu VLSI Ltd, Syst LSI Design Dept, Tado, Mie, Japan
[2] Fujitsu Ltd, LSI Mfg Grp, Tado, Mie, Japan
来源：
MICROELECTRONICS AND RELIABILITY | 1998年 / 38卷 / 6-8期
关键词：
D O I：
10.1016/S0026-2714(98)00089-4
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
As a result of performing the Iddq (IC's power supply current) failure analysis on CMOS logic LSI using the backside OBIC (optical beam induced current) method, we succeeded in detecting a short circuit at an overlapped portion between a power supply line and if signal line. So far a circuit failure beneath the Al wiring has been difficult to find because the surface of LSI chip is covered by the wiring. However, we succeeded in detecting the carriers abnormally generated at a failure portion of a circuit on the chip surface by the optical energy when the backside of wafer was irradiated by an He-Ne laser. The backside OBIC technique is an effective method of failure analysis for advanced multilayer LSIs. (C) 1998 Elsevier Science Ltd. All rights reserved.
引用
收藏
页码：993 / 996
页数：4
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