THE FIRST HARDWARE MSC ALGORITHM IMPLEMENTATION

被引：0

作者：

Fabera, V. ^{[1
]}

Musil, T. ^{[1
]}

Rada, J. ^{[1
]}

机构：

[1] Czech Tech Univ, Fac Transportat Sci, Konviktska 20, Prague 11000 1, Czech Republic

来源：

NEURAL NETWORK WORLD | 2017年 / 27卷 / 06期

关键词：

multistream compression; MSC; FPGA; compression; parallel compression; left tree representation;

D O I：

10.14311/NNW.2017.27.029

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

This paper describes the first attempt of hardware implementation of Multistream Compression (MSC) algorithm. The algorithm is transformed to series of Finite State Machines with Datapath using Register-Transfer methodology. Those state machines are then implemented in VHDL to selected FPGA platform. The algorithm utilizes a special tree data structure, called MSC tree. For storage purpose of the MSC tree a Left Tree Representation is introduced. Due to parallelism, the algorithm uses multiple port access to SDRAM memory.

引用

页码：541 / 555

页数：15

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