RAPANUI:: A case study in rapid prototyping for multiprocessor system-on-chip

被引：0

作者：

Paya-Vaya, Guillermo ^{[1
]}

Martin-Langerwerf, Javier ^{[1
]}

Pirsch, Peter ^{[1
]}

机构：

[1] Leibniz Univ Hannover, Inst Microelect Syst, Hannover, Germany

来源：

DSD 2007: 10TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN ARCHITECTURES, METHODS AND TOOLS, PROCEEDINGS | 2007年

关键词：

design verification and modeling; emulation; prototyping; case study;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper describes a case study in a new rapid prototyping-based design framework for exploring and validating complex multiprocessor architectures for multimedia applications. The goal of the presented methodology is to speed up and improve the verification flow of a multiprocessor system that will finally be implemented as an ASIC. The case study consists of a 64-bit compatible AMBA AHB system bus which connects up to 14.32-Bit RISC processors to a host interface. A typical parallel computing application has been implemented for the parameterized multiprocessor system. The employed FPGA emulation environment increases by up to 200 the simulation frequency of the global system on a workstation (2.2 GHz AMD Dual Opteron with 8 GB RAM). Moreover a stand-alone emulation can be performed at the maximum achievable frequency (65 MHz).

引用

页码：215 / 221

页数：7

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