Gate-induced drain leakage in FD-SOI devices: What the TFET teaches us about the MOSFET

被引:9
|
作者
Wan, J. [1 ]
Le Royer, C. [2 ]
Zaslavsky, A. [3 ]
Cristoloveanu, S. [1 ]
机构
[1] MINATEC, INP Grenoble, IMEP LAHC, F-38016 Grenoble, France
[2] Minatec, CEA LETI, F-38054 Grenoble 9, France
[3] Brown Univ, Sch Engn, Providence, RI 02912 USA
关键词
Fully depleted; Silicon on insulator; Tunneling; Field effect transistor; Gate-induced drain leakage; BAND TUNNELING MODEL; GIDL;
D O I
10.1016/j.mee.2011.03.092
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper compares the gate-induced drain leakage (GIDL) in fully-depleted (FD) silicon-on-insulator (SOI) tunneling field effect transistor (TFET) and in standard metal-oxide-semiconductor FET (MOSFET) fabricated in the same process. The measurements show that the MOSFET GIDL current is lower than the GIDL in a TFET with the same junction doping, especially for devices with thick gate oxide and under low drain bias. A model describing lateral band-to-band tunneling (BTBT) is developed for GIDL in the FD-SOI TFET. By combining the model of gate-controllable tunneling diode in series with a field effect diode, we achieve an accurate picture of GIDL in FD-SOI MOSFETs. (C) 2011 Elsevier B.V. All rights reserved.
引用
收藏
页码:1301 / 1304
页数:4
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