Improved current drivability with back-gate bias for elevated source and drain structured FD-SOI SiGe MOSFET

被引：1

作者：

Choi, Hoon ^{[2
]}

Moon, Kyoho ^{[2
]}

Lee, Chulgu ^{[2
]}

Cho, Il Hwan ^{[1
]}

Hong, Sang Jeen ^{[1
]}

机构：

[1] Myongji Univ, Dept Elect Engn, Yongin 449728, South Korea

[2] LGPhilips LCD Inc, Panel Technol Dept, Gumi Si 730731, Gyungsangbuk Do, South Korea

来源：

MICROELECTRONIC ENGINEERING | 2009年 / 86卷 / 11期

关键词：

FD-SOI; SiGe; UHV-CVD; Back-gate bias; THRESHOLD VOLTAGE;

D O I：

10.1016/j.mee.2009.03.015

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Fully depleted (FD) silicon-on-insulator (SOI) MOSFET structure with back-gate bias is suggested for high speed and low power consumption for portable communication application. Ni silicide is demonstrated for improving current drivability for low power consumption by reducing series resistance in the source and drain region. Threshold voltage adjustment is also achieved through applied back-gate bias. For the formation of the buried back-gate, the selection of impurity type as well as its doping concentration is controlled. Employing back-gate bias for FD-SOI NMOSFET, improved current drivability with variable threshold voltage is achieved. Short channel devices are fabricated and its electrical characteristics are obtained under various conditions. (C) 2009 Elsevier B.V. All rights reserved.

引用

页码：2165 / 2169

页数：5

共 42 条

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