System-level State Equality Detection for the Formal Dynamic Verification of Legacy Distributed Applications

被引:1
|
作者
Guthmuller, Marion [1 ,2 ,3 ]
Quinson, Martin [1 ,2 ,3 ]
Corona, Gabriel [1 ,2 ,3 ]
机构
[1] Univ Lorraine, LORIA, UMR 7503, Vandoeuvre Les Nancy, France
[2] CNRS, LORIA, UMR 7503, Vandoeuvre Les Nancy, France
[3] Inria, AlGorille Project Team, Villers Les Nancy, France
关键词
D O I
10.1109/PDP.2015.95
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The ever increasing complexity of distributed systems mandates to formally verify their design and implementation. Unfortunately, the common approaches and existing tools to formally establish the correctness of these systems remain hardly applicable to the kind of legacy applications that are commonly found in the HPC community. We present how system-level memory introspection can be achieved directly at runtime without relying on the source code analysis. We use this mechanism to detect the equality of the application's state at system level. As the storage of the system state may be memory expensive, we compact the memory by sharing unchanged memory pages between snapshots. This enables the automated verification of safety and liveness properties on legacy distributed applications written in Fortran or C/C++ using the MPI standard. We demonstrate the effectiveness of our approach on several programs from the MPICH3 test suite.
引用
收藏
页码:451 / 458
页数:8
相关论文
共 50 条
  • [1] System-level state equality detection for the formal dynamic verification of legacy distributed applications
    Guthmuller, Marion
    Corona, Gabriel
    Quinson, Martin
    JOURNAL OF LOGICAL AND ALGEBRAIC METHODS IN PROGRAMMING, 2018, 96 : 1 - 11
  • [2] Application of formal methods for system-level verification of Network on Chip
    Palaniveloo, Vinitha Arakkonam
    Sowmya, Arcot
    2011 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI (ISVLSI), 2011, : 162 - 169
  • [3] SYSTEM-LEVEL SUPPORT FOR DEPENDABLE DISTRIBUTED APPLICATIONS
    KROEGER, R
    NETT, E
    LECTURE NOTES IN COMPUTER SCIENCE, 1991, 563 : 178 - 181
  • [4] System-level assertions: approach for electronic system-level verification
    Sohofi, Hassan
    Navabi, Zainalabedin
    IET COMPUTERS AND DIGITAL TECHNIQUES, 2015, 9 (03): : 142 - 152
  • [5] Efficient system-level functional verification methodology for multimedia applications
    Cupák, M
    Catthoor, F
    De Man, HJ
    IEEE DESIGN & TEST OF COMPUTERS, 2003, 20 (02): : 56 - 64
  • [6] Introspection mechanisms for semi-formal verification in a system-level design environment
    Metzger, M.
    Bastien, F.
    Rousseau, F.
    Vachon, J.
    Aboulhamid, E. M.
    SEVENTEENTH IEEE INTERNATIONAL WORKSHOP ON RAPID SYSTEM PROTOTYPING, 2006, : 91 - +
  • [7] The application of a distributed system-level diagnosis algorithm in dynamic positioning system
    Wang, HJ
    Bian, XQ
    Ding, FG
    Han, GP
    PROCEEDINGS OF THE 4TH WORLD CONGRESS ON INTELLIGENT CONTROL AND AUTOMATION, VOLS 1-4, 2002, : 2274 - 2278
  • [8] A formal framework for modeling and analysis of system-level dynamic power management
    Yardi, S
    Channakeshava, K
    Hsiao, MS
    Martin, TL
    Ha, DS
    2005 IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS & PROCESSORS, PROCEEDINGS, 2005, : 119 - 126
  • [9] Introduction: Formal Methods for CAD: Enabling Technologies and System-level Applications
    Ganesh C. Gopalakrishnan
    Formal Methods in System Design, 2000, 16 : 5 - 6
  • [10] Introduction: Formal methods for CAD: Enabling technologies and system-level applications
    Gopalakrishnan, GC
    FORMAL METHODS IN SYSTEM DESIGN, 2000, 16 (01) : 5 - 6