An on-chip metastability measurement circuit to characterize synchronization behavior in 65nm

被引：0

作者：

Beer, Salomon ^{[1
,2
]}

Ginosar, Ran ^{[1
]}

Priel, Michael ^{[2
]}

Dobkin, Rostislav ^{[1
]}

Kolodny, Avinoam ^{[1
]}

机构：

[1] Technion Israel Inst Technol, EE Dept, Haifa, Israel

[2] Freescale Semicond, Austin, TX USA

来源：

2011 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2011年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Recent synchronizer metastability measurements indicate degradation of MTBF with technology scaling, calling for measurement and calibration circuits in 65nm circuits and beyond. An on-chip metastability measurement circuit was fabricated in a 65nm 1.1V bulk CMOS. A fully digital on-chip measurement system is presented here that helps to characterize synchronizers in future technologies. Different types of synchronizers were measured and compared. The standard library FF is demonstrated to have lower tau value than various feedback flip-flops.

引用

页码：2593 / 2596

页数：4

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