GasP control for domino circuits

被引：4
|
作者：
Ebergen, J
Gainsley, J
Lexau, J
Sutherland, I
机构：
来源：
11TH IEEE INTERNATIONAL SYMPOSIUM ON ASYNCHRONOUS CIRCUITS AND SYSTEMS, PROCEEDINGS | 2005年
关键词：
D O I：
10.1109/ASYNC.2005.21
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
We present two novel asynchronous control circuits for domino pipelines. The control circuits are based on GasP circuits, have a minimum cycle time of six gate delays, and compare favorably with previously published control circuits. We present some results from a chip implementation of several 64-bit domino adders in a TSMC CMOS 180 nm process technology.
引用
收藏
页码：12 / 22
页数：11
相关论文
共 50 条
  • [31] Gasp
    不详
    FORBES, 2005, 176 (09): : 55 - 56
  • [32] GASP
    CELLIER, FE
    PRITSKER, AAB
    SIMULATION, 1980, 34 (04) : 137 - 139
  • [33] GASP
    不详
    NEW REPUBLIC, 1980, 182 (1-2) : 3 - 3
  • [34] Charge-sharing alleviation and detection for CMOS domino circuits
    Chang, SC
    Cheng, CH
    Jone, WB
    Lee, SD
    Wang, JS
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2001, 20 (02) : 266 - 280
  • [35] Phase assignment for synthesis of low-power domino circuits
    Patra, P
    Narayanan, U
    Kim, T
    ELECTRONICS LETTERS, 2001, 37 (13) : 814 - 816
  • [36] DYNAMIC LATCH FOR HIGH-SPEED GAAS DOMINO CIRCUITS
    NARY, KR
    LONG, SI
    ELECTRONICS LETTERS, 1992, 28 (01) : 36 - 37
  • [37] DOIND: a technique for leakage reduction in nanoscale domino logic circuits
    Ambika Prasad Shah
    Vaibhav Neema
    Shreeniwas Daulatabad
    Journal of Semiconductors, 2016, (05) : 73 - 81
  • [38] Switch-level delay test of domino logic circuits
    Natarajan, S
    Gupta, SK
    Breuer, MA
    INTERNATIONAL TEST CONFERENCE 2001, PROCEEDINGS, 2001, : 367 - 376
  • [39] Statistical modeling of crosstalk noise in domino CMOS logic circuits
    Sharma, Vipin
    Al-Assadi, Waleed K.
    ADVANCES AND INNOVATIONS IN SYSTEMS, COMPUTING SCIENCES AND SOFTWARE ENGINEERING, 2007, : 469 - 474
  • [40] Comparative analysis of various Domino logic circuits for better performance
    Thakur, Ravikant
    Dadoria, Ajay Kumar
    Gupta, Tarun Kumar
    2014 INTERNATIONAL CONFERENCE ON ADVANCES IN ELECTRONICS, COMPUTERS AND COMMUNICATIONS (ICAECC), 2014,
12345