Explicit model for the gate tunneling current in double-gate MOSFETs

被引:6
|
作者
Chaves, Ferney [1 ]
Jimenez, David [1 ]
Sune, Jordi [1 ]
机构
[1] Univ Autonoma Barcelona, Dept Elect Engn, Escola Engn, Bellaterra 08193, Spain
关键词
Double-gate MOSFETs; Modeling quantization; Gate tunneling; Direct tunneling; LEAKAGE CURRENT; LAYER;
D O I
10.1016/j.sse.2011.11.003
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, we present an explicit compact quantum model for the gate tunneling current in double-gate metal-oxide-semiconductor field-effect transistors (DG-MOSFETs). Specifically, an explicit closed-form expression is proposed, useful for the fast evaluation of the gate leakage in the context of electrical circuit simulators. A benchmarking test against 1D self-consistent numerical solution of Schrodinger-Poisson (SP) equations has been performed to demonstrate the accuracy of the model. (C) 2011 Elsevier Ltd. All rights reserved.
引用
收藏
页码:93 / 97
页数:5
相关论文
共 50 条
  • [1] Explicit model for direct tunneling current in double-gate MOSFETs through a dielectric stack
    Chaves, Ferney
    Jimenez, David
    Sune, Jordi
    [J]. SOLID-STATE ELECTRONICS, 2012, 76 : 19 - 24
  • [2] Analytic and explicit current model of undoped double-gate MOSFETs
    Zhu, Z.
    Zhou, X.
    Rustagi, S. C.
    See, G. H.
    Lin, S.
    Zhu, G.
    Wei, C.
    Zhang, J.
    [J]. ELECTRONICS LETTERS, 2007, 43 (25) : 1464 - 1466
  • [3] Direct-tunneling gate leakage current in double-gate and ultrathin body MOSFETs
    Chang, L
    Yang, KJ
    Yeo, YC
    Polishchuk, I
    King, TJ
    Hu, CM
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2002, 49 (12) : 2288 - 2295
  • [4] Explicit quantum potential and charge model for double-gate MOSFETs
    Chaves, Ferney
    Jimenez, David
    Sune, Jordi
    [J]. SOLID-STATE ELECTRONICS, 2010, 54 (05) : 530 - 535
  • [5] Drain current model for nanoscale double-gate MOSFETs
    Hariharan, Venkatnarayan
    Thakker, Rajesh
    Singh, Karmvir
    Sachid, Angada B.
    Patil, M. B.
    Vasi, Juzer
    Rao, V. Ramgopal
    [J]. SOLID-STATE ELECTRONICS, 2009, 53 (09) : 1001 - 1008
  • [6] Explicit continuous models for double-gate and surrounding-gate MOSFETs
    Yu, Bo
    Lu, Huaxin
    Liu, Minjian
    Taur, Yuan
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2007, 54 (10) : 2715 - 2722
  • [7] Accurate Calculation of Gate Tunneling Current in Double-Gate and Single-Gate SOI MOSFETs Through Gate Dielectric Stacks
    Chaves, Ferney A.
    Jimenez, David
    Garcia Ruiz, Francisco J.
    Godoy, Andres
    Sune, Jordi
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2012, 59 (10) : 2589 - 2596
  • [8] An analytical subthreshold current model for ballistic double-gate MOSFETs
    Autran, JL
    Munteanu, D
    Tintori, O
    Aubert, M
    Decarre, E
    [J]. NSTI NANOTECH 2004, VOL 2, TECHNICAL PROCEEDINGS, 2004, : 171 - 174
  • [9] An analytical drain current model for symmetric double-gate MOSFETs
    Yu, Fei
    Huang, Gongyi
    Lin, Wei
    Xu, Chuanzhong
    [J]. AIP ADVANCES, 2018, 8 (04):
  • [10] A Model of the Gate Capacitance of Surrounding Gate Transistors: Comparison With Double-Gate MOSFETs
    Garcia Ruiz, Francisco J.
    Maria Tienda-Luna, Isabel
    Godoy, Andres
    Donetti, Luca
    Gamiz, Francisco
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2010, 57 (10) : 2477 - 2483