AC TDDB Analysis for Circuit-Level Gate Oxide Wearout Reliability Assessment

We present a framework for circuit-level and application-level gate oxide wearout analysis using a quasi-static AC Time-Dependent Dielectric Breakdown (TDDB) model. The method can assess the gate oxide wearout rate for analog circuit blocks operating in normal or extreme conditions in the field. It can also be used to assess gate-oxide wearout rates for discrete MOSFETs, IGBTs, or any other device with a gate oxide, operated in specific applications. The model has been implemented in Matlab and R as well as Cadence design tools, the latter to allow circuit designers to do quick reliability assessments on their designs. As part of this framework, we introduce gate oxide failure rate versus operating time plots, which offer a concise picture of the amount of failures expected in the field due to gate oxide wearout. This allows designers and product engineers to assess the reliability of a product in terms of ppm failure rates with time in operation.