Emerging FETs for Low Power and High Speed Embedded Dynamic Random Access Memory

The work reports on the assessment of two emerging devices, namely Tunnel Field Effect Transistor (TFET) and Junctionless Transistor (JLT), for applicability as low power and high speed embedded Dynamic Random Access Memory (eDRAM) at 85 degrees C. The critical aspect of DRAM functionality being independent gate operation has been realized through twin/dual architecture in TFET and JLT. The first (front) gate primarily controls the read operation based on band-to-band tunneling (TFET) and drift-diffusion mechanism (JLT), whereas the second gate is responsible for charge storage in both the devices. The ability of TFET and JLT with write operation in short time (<10 ns) and at low power shows their feasibility for embedded memory applications. TFET is benefited with a high retention time (similar to 350 ms at 85 degrees C for gate length of 250 nm) while JLT requires further optimization for longer charge sustenance. The concept and insights into device operation highlight the advantages and limitations of devices for eDRAM.