CMOS edge-triggered flip-flop using one latch

被引：9

作者：

Wu, X ^{[1
]}

Wei, J ^{[1
]}

机构：

[1] Hangzhou Univ, Dept Elect Engn, Hangzhou 310028, Peoples R China

来源：

ELECTRONICS LETTERS | 1998年 / 34卷 / 16期

关键词：

D O I：

10.1049/el:19981095

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The authors use the narrow pulse produced by the race-hazard of the clock signal to control the latch, so as to meet the 'nontransparent' demand. Based on this principle, a novel CMOS edge-triggered flip-flop using one latch is proposed which has a simpler construction and lower power dissipation than previous flip-flops.

引用

页码：1581 / 1582

页数：2

共 50 条

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[6] RESEARCH INTO TERNARY EDGE-TRIGGERED JKL FLIP-FLOP
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[10] METASTABILITY OF CMOS LATCH FLIP-FLOP
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