VLSI Implementation Of Current Mode Analog Multiplier

被引：0
|
作者：
Borkar, Bhushan D. [1 ]
Tijare, Ankita D. [2 ]
机构：
[1] Yeshwantrao Chavan Coll Engn, Elect, Nagpur, Maharashtra, India
[2] Yeshwantrao Chavan Coll Engn, Dept Elect Engn, Nagpur, Maharashtra, India
来源：
2015 INTERNATIONAL CONFERENCE ON COMMUNICATIONS AND SIGNAL PROCESSING (ICCSP) | 2015年
关键词：
CMOS technology; current-mode; Multiplier/divider circuit; squaring circuit; translinear loop;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper presents low-voltage, low power current-mode analog multiplier/divider circuit, which is based on current-mode squaring circuit. The trans linear loop is the basic circuit in the realization of MDC (multiplier/divider circuit). Current mode operation has advantage of simple circuitry. The circuit complexity is reduced by reusing MOS transistor for both the squaring circuits. The proposed MDC is designed for implementing in 0.18um CMOS technology, with low voltage(supply voltage of 1.2 V) and low power operation. The circuit power consumption is 317uW.
引用
收藏
页码：531 / 534
页数：4
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