VLSI analog multiplier/divider circuit

Intelligent systems require signal processing which can be done quickly and accurately. The commonly used digital approach has many advantages, but some disadvantages as well. Analog signal processing is in many cases much simpler, faster, and easier for performing parallel processing. In this paper a new accurate CMOS multiplier/divider circuit is presented. In contrary to previous solutions, which use the square law formula for MOS transistors operating in the strong inversion mode, the multiplier/divider circuits employ MOS transistor characteristics in the subthreshold conduction mode. It is shown that the circuit generates very accurate results. With some modification, the basic circuit can also be used as a four-quadrant multiplier, which may operate for both positive and negative input signals. The circuit itself may have many applications as multiplier, divider, signal squaring, square root calculations, frequency modulation, frequency doubling, etc. Most importantly it can be used for analog signal processing in many intelligent systems of industrial electronics.