Analysis of HCS in STI-based LDMOS transistors

被引：14
|
作者：
Reggiani, Susanna [1 ]
Poli, Stefano [1 ]
Gnani, Elena [1 ]
Gnudi, Antonio [1 ]
Baccarani, Giorgio [1 ]
Denison, Marie [2 ]
Pendharkar, Sameer [2 ]
Wise, Rick [2 ]
Seetharaman, Sridhar [2 ]
机构：
[1] Univ Bologna, ARCES, Dept Elect, Bologna, Italy
[2] Texas Instruments Inc, Dallas, TX USA
来源：
2010 INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM | 2010年
关键词：
TCAD analysis; LDMOS; Hot-carrier stress; MOS-TRANSISTORS; RUGGED LDMOS;
D O I：
10.1109/IRPS.2010.5488712
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A numerical investigation of the hot-carrier behavior of a lateral DMOS transistor with shallow trench isolation (STI) is carried out. The measured drain-current degradation induced by hot-carrier stress (HCS) is nicely reproduced by TCAD results revealing that interface traps are mainly formed at the STI corner close to the channel. The effect of typical device design variations on hot-carrier degradation is analyzed.
引用
收藏
页码：881 / 886
页数：6
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