共 50 条
- [1] Effect of power cycling duration on coupled power and thermal cycling reliability of board-level chip-scale packages PROCEEDINGS OF THE 7TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE, VOLS. 1 AND 2, 2005, : 119 - 124
- [5] Prediction of board-level reliability of chip-scale packages under consecutive drops PROCEEDINGS OF THE 7TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE, VOLS. 1 AND 2, 2005, : 73 - 80
- [7] A numerical study of board-level stacked-die packages under coupled power and thermal cycling test conditions 2006 INTERNATIONAL MICROSYSTEMS, PACKAGING, ASSEMBLY CONFERENCE TAIWAN (IMPACT), PROCEEDINGS, 2006, : 123 - +
- [9] Thermal-mechanical coupling analysis of board-level chip-scale packages subjected to power cycling of different powering durations PROCEEDINGS OF THE ASME INTERNATIONAL MECHANICAL ENGINEERING CONGRESS AND EXPOSITION 2007, VOL 5: ELECTRONICS AND PHOTONICS, 2008, : 241 - 246