Fast FPGA prototyping of a multipath fading channel emulator via high-level design

被引:4
|
作者
Hwang, Jeng-Kuang [1 ]
Lin, Kuei-Horng [1 ]
Li, Jeng-Da [1 ]
Deng, Juinn-Horng [1 ]
机构
[1] Yuan Ze Univ, Dept Commun Engn, Chungli, Taiwan
关键词
D O I
10.1109/ISCIT.2007.4392006
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A baseband multipath fading channel emulator is implemented on Xilinx XtremeDSP FPGA platform through high-level design. Without any RTL coding, fast prototyping of important modules can be done in the form of high-level Simulink models and Xilinx System Generator IP blocks. These modules include the white Gaussian noise generator (WGNG), Doppler filter, direct digital frequency synthesizer (DDFS), multi-rate interpolators, and multipath signal generator. Since all modules are designed in high level, the system parameters and configuration can be easily changed as desired. The FPGA emulator have been tested at a sampling rate of 30 Msps, and all the measured signals are well coincides with the simulation results, thus verifying the correctness of the design.
引用
收藏
页码:168 / 171
页数:4
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