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- [22] Symbiotic HW Cache and SW DTLB Prefetching for DRAM/NVM Hybrid Memory 2020 IEEE 28TH INTERNATIONAL SYMPOSIUM ON MODELING, ANALYSIS, AND SIMULATION OF COMPUTER AND TELECOMMUNICATION SYSTEMS (MASCOTS 2020), 2020, : 111 - 118
- [23] MT2: Memory Bandwidth Regulation on Hybrid NVM/DRAM Platforms PROCEEDINGS OF THE 20TH USENIX CONFERENCE ON FILE AND STORAGE TECHNOLOGIES, FAST 2022, 2022, : 199 - 215
- [27] Page Policy Control with Memory Partitioning for DRAM Performance and Power Efficiency 2013 IEEE INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN (ISLPED), 2013, : 298 - 303
- [28] M-CLOCK: Migration-optimized Page Replacement Algorithm for Hybrid DRAM and PCM Memory Architecture 30TH ANNUAL ACM SYMPOSIUM ON APPLIED COMPUTING, VOLS I AND II, 2015, : 2001 - 2006
- [29] Fine-Grained Data Management for DRAM/SSD Hybrid Main Memory Architecture IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2016, E99D (12): : 3172 - 3176