Power analysis for sequential circuits at logic level

被引：1
|
作者：
Schneider, PH [1 ]
Senn, MA [1 ]
Wurth, B [1 ]
机构：
[1] SIEMENS AG,ZFE T SE 5,D-81730 MUNICH,GERMANY
来源：
EURO-DAC '96 - EUROPEAN DESIGN AUTOMATION CONFERENCE WITH EURO-VHDL '96 AND EXHIBITION, PROCEEDINGS | 1996年
关键词：
D O I：
10.1109/EURDAC.1996.558047
中图分类号：
T [工业技术];
学科分类号：
08 ;
摘要：
引用
收藏
页码：22 / 27
页数：6
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