Observation of Slow Oxide Traps at MOSFETs Having Metal/High-k Gate Dielectric Stack in Accumulation Mode

被引：6

作者：

Cho, Heung-Jae ^{[1
,3
]}

Son, Younghwan

Oh, Byoungchan

Lee, Sanghoon ^{[2
]}

Lee, Jong-Ho

Park, Byung-Gook

Shin, Hyungcheol

机构：

[1] Hynix Semicond Incorporation, Ichon 467701, South Korea

[2] Univ Calif Santa Barbara, Dept Elect & Comp Engn, Santa Barbara, CA 93106 USA

[3] Seoul Natl Univ, Sch Elect Engn & Comp Sci, Seoul 151742, South Korea

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2010年 / 57卷 / 10期

关键词：

Accumulation mode; I-g random telegraph noise (RTN); metal/high-k gate dielectric stack; random telegraph noise (RTN); slow oxide trap; trap location; trap's energy level; RANDOM TELEGRAPH NOISE; LOW-FREQUENCY NOISE; I-G-RTN; LEAKAGE CURRENT; EXTRACTION; NMOSFETS; ENERGY;

D O I：

10.1109/TED.2010.2057251

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The random telegraph noise in a gate leakage current in an accumulation mode has been studied to characterize slow oxide traps at nMOSFET devices having a TiN/HfO2/SiO2 gate stack. New equations for the trap's vertical location and energy level were derived by means of the relation between the trap's energy and Fermi levels in the accumulation mode. Through our analysis in both the accumulation and inversion modes, we found that the measurement in the accumulation mode is complementary to that in the inversion mode in order to assess the traps within a wide range of energy levels.

引用

页码：2697 / 2703

页数：7

共 50 条

[31] A New Physical 1/f Noise Model for Double-Stack High-k Gate-Dielectric MOSFETs
Song, Seung Hyun
Choi, Hyun-Sik
Baek, Rock-Hyun
Choi, Gil-Bok
Park, Min-Sang
Lee, Kyung Taek
Sagong, Hyun Chul
Lee, Sang-Hyun
Jung, Sung Woo
Kang, Chang Yong
Jeong, Yoon-Ha
[J]. IEEE ELECTRON DEVICE LETTERS, 2009, 30 (12) : 1365 - 1367
[32] Impact of Strain on the Performance of high-k/metal replacement gate MOSFETs
Wang, Xingsheng
Roy, Scott
Asenov, Asen
[J]. ULIS 2009: 10TH INTERNATIONAL CONFERENCE ON ULTIMATE INTEGRATION OF SILICON, 2009, : 289 - 292
[33] Electrical characteristics of high-k metal Oxide/SiO2 stack gate dielectric prepared by reaction of metal with SiO2
Shin, J
Jeon, S
Hwang, H
[J]. JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 2002, 149 (01) : F1 - F3
[34] Metal gate and high-k gate dielectrics for sub 50 nm high performance MOSFETs
Park, Hokyung
Hasan, Musarrat
Jo, Minseok
Hwang, Hyunsang
[J]. ELECTRONIC MATERIALS LETTERS, 2007, 3 (02) : 75 - 85
[35] Modeling and Optimization of Variability in High-k/Metal-Gate MOSFETs
Yu, T-H
Ohtou, Tetsu
Liu, K-M
Chen, W-Y
Hu, Y-P
Cheng, C-F
Sheu, Y-M
[J]. 2009 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES, 2009, : 91 - +
[36] Schottky s/d MOSFETs with high-K gate dielectrics and metal gate electrodes
Zhu, SY
Chen, JD
Hu, HY
Whang, SJ
Chen, JH
Shen, C
Li, MF
Lee, SJ
Zhu, CX
Chan, DSH
Du, AY
Tung, CH
Singh, J
Chin, A
Kwong, DL
[J]. 2004: 7TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUITS TECHNOLOGY, VOLS 1- 3, PROCEEDINGS, 2004, : 53 - 56
[37] Low-frequency noise in high-k gate dielectric nanoscale MOSFETs
Han, I. K.
Nam, H. D.
Choi, W. J.
Lee, J. I.
Szentpali, B.
Chovet, A.
[J]. JOURNAL OF THE KOREAN PHYSICAL SOCIETY, 2006, 49 (03) : 1117 - 1120
[38] Gate-first high-k/metal gate stack for advanced CMOS technology
Nara, Y.
Mise, N.
Kadoshima, M.
Morooka, T.
Kamiyama, S.
Matsuki, T.
Sato, M.
Ono, T.
Aoyama, T.
Eimori, T.
Ohji, Y.
[J]. 2008 9TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED-CIRCUIT TECHNOLOGY, VOLS 1-4, 2008, : 1241 - 1243
[39] Analog and RF Performance Evaluation of Dual Metal Double Gate High-k Stack (DMDG-HKS) MOSFETs
Gupta, Santosh K.
Baishya, S.
[J]. JOURNAL OF NANO- AND ELECTRONIC PHYSICS, 2013, 5 (03)
[40] Gate Leakage in Hafnium Oxide High-k Metal Gate nMOSFETs
Rao, Ashutosh
Mukhopadhyay, Gautam
[J]. 2013 2ND INTERNATIONAL CONFERENCE ON ADVANCES IN ELECTRICAL ENGINEERING (ICAEE 2013), 2013, : 389 - 394

← 1 2 3 4 5 →