Gate-first high-k/metal gate stack for advanced CMOS technology

被引:0
|
作者
Nara, Y. [1 ]
Mise, N. [1 ]
Kadoshima, M. [1 ]
Morooka, T. [1 ]
Kamiyama, S. [1 ]
Matsuki, T. [1 ]
Sato, M. [1 ]
Ono, T. [1 ]
Aoyama, T. [1 ]
Eimori, T. [1 ]
Ohji, Y. [1 ]
机构
[1] Semicond Leading Edge Technol Selete, Tsukuba, Ibaraki 3058569, Japan
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TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Practical and manufacturable solutions for metal gate/dual high-k CMOS integration are presented. In order to overcome the difficulties of threshold voltage control of metal gate/high-k gate stack especially for gate-first integration, several material designs have been proposed so far. These include different metal gate materials and different high-k materials which are separately used in nMOS and pMOS transistors. These approaches sometimes bring about complicated CMOS integration scheme. In this paper, therefore, we will give simple metal gate/dual high-k. CMOS fabrication processes with low threshold voltages which are suitable for scaled CMOS device manufacturing.
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页码:1241 / 1243
页数:3
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