A 16 x 16 nonvolatile programmable analog vector-matrix multiplier

被引：11

作者：

Aslam-Siddiqi, A ^{[1
]}

Brockherde, W ^{[1
]}

Hosticka, BJ ^{[1
]}

机构：

[1] Fraunhofer Inst Microelect Circuits & Syst, D-47057 Duisburg, Germany

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1998年 / 33卷 / 10期

关键词：

analog memories; analog multipliers; erasable and programmable read-only memory (EPROM);

D O I：

10.1109/4.720396

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, we present a 16 x 16 analog vector-matrix multiplier with analog electrically erasable and programmable read-only memories (EEPROM's) used as nonvolatile storage for the weight matrix values. Each weight matrix value is stored in an EEPROM transistor as a change of the threshold voltage, and the same EEPROM transistor is used for the multiplication by utilizing the square-law characteristic of the metal-oxide-semiconductor field-effect transistor. This allows a very simple circuit for the multiplier array with a size of about 1 x 1 mm(2). The vector-matrix multiplier has been fabricated in a 1,5-mu m single-poly complementary metal-oxide-semiconductor/EEPROM technology and successfully tested.

引用

页码：1502 / 1509

页数：8

共 50 条

[21] Design and Implementation of 16x16 Modified Booth Multiplier
Manjunath
Harikiran, Venama
Manikanta, Kopparapu
Sivanantham, S.
Sivasankaran, K.
[J]. PROCEEDINGS OF 2015 ONLINE INTERNATIONAL CONFERENCE ON GREEN ENGINEERING AND TECHNOLOGIES (IC-GET), 2015,
[22] Design and Implementation of 16 x 16 Multiplier Using Vedic Mathematics
Pohokar, S. P.
Sisal, R. S.
Gaikwad, K. M.
Patil, M. M.
Borse, Rushikesh
[J]. 2015 INTERNATIONAL CONFERENCE ON INDUSTRIAL INSTRUMENTATION AND CONTROL (ICIC), 2015, : 1174 - 1177
[23] ECL MULTIPLIER BLITZES 16 X 16 IN 9 NS MAX
MYRVAAGNES, R
[J]. ELECTRONIC PRODUCTS MAGAZINE, 1986, 28 (22): : 29 - +
[24] A 45NS 16X16 CMOS MULTIPLIER
KAJI, Y
SUGIYAMA, N
KITAMURA, Y
OHYA, S
KIKUCHI, M
[J]. ISSCC DIGEST OF TECHNICAL PAPERS, 1984, 27 : 84 - 85
[25] High-efficiency vector-matrix multiplier for large-scale optoelectronic neurocoprocessor
Rozhkov, OV
Verenikina, NM
Yalov, SB
[J]. SECOND INTERNATIONAL CONFERENCE ON OPTICAL INFORMATION PROCESSING, 1996, 2969 : 88 - 91
[26] VHDL implementation of 16x16 multiplier using pipelined 16x8 modified Radix-4 booth multiplier
Tawfeek, Radwa M.
Elmenyawi, Marwa A.
[J]. INTERNATIONAL JOURNAL OF ELECTRONICS, 2023, 110 (06) : 971 - 985
[27] A Large 16*16 IF Analog Switch Matrix for Personal Communications Satellites
Markku Åberg
Arto Rantala
Helena Pohjonen
[J]. Analog Integrated Circuits and Signal Processing, 1998, 15 : 143 - 151
[28] A large 16*16 IF analog switch matrix for personal communications satellites
Aberg, M
Rantala, A
Pohjonen, H
[J]. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 1998, 15 (02) : 143 - 151
[29] A 16-BIT X 16-BIT PIPELINED MULTIPLIER MACROCELL
HENLIN, DA
FERTSCH, MT
MAZIN, M
LEWIS, ET
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1985, 20 (02) : 542 - 547
[30] The hybrid hierarchical neural optoelectronic processor based on the vector-matrix multiplier and the pre-processing unit
Evtikhiev, NN
Onyky, BN
Starikov, RS
Repin, DV
Scherbakov, IB
Zabulonov, MI
[J]. SECOND INTERNATIONAL CONFERENCE ON OPTICAL INFORMATION PROCESSING, 1996, 2969 : 48 - 51

← 1 2 3 4 5 →