Experimental validation of a modular multilevel inverter with less number of switches

被引：0
|
作者：
Thakre, Kishor [1 ]
Mohanty, Kanungo Barada [1 ]
Kommukuri, Vinaya Sagar [1 ]
Chatterjee, Aditi [1 ]
机构：
[1] Natl Inst Technol Rourkela, Dept Elect Engn, Rourkela, Odisha, India
来源：
2016 NATIONAL POWER SYSTEMS CONFERENCE (NPSC) | 2016年
关键词：
Multilevel inverter; less number of components; sinusoidal pulse width modulation; total harmonic distortion; CONVERTER;
D O I：
暂无
中图分类号：
TE [石油、天然气工业]; TK [能源与动力工程];
学科分类号：
0807 ; 0820 ;
摘要：
This study presents a modular structure for multilevel inverter that operate in symmetric manner. The proposed modular multilevel inverter can generate staircase output voltage waveform that includes all voltage levels. The proposed multilevel inverter is compared with conventional cascaded multilevel inverter in terms of number of switches. Multicarrier sinusoidal pulse width modulation scheme adopted for generating switching signals. The effectiveness of proposed modular multilevel inverter is verified through simulation and experimental implementation.
引用
收藏
页数：5
相关论文
共 50 条
  • [41] A New Bridgeless Multilevel Inverter Structure with Reduced Number of Power Switches
    Bektas, Enes
    Bayindir, Kamil Cagatay
    Karaca, Hulusi
    [J]. 2017 10TH INTERNATIONAL CONFERENCE ON ELECTRICAL AND ELECTRONICS ENGINEERING (ELECO), 2017, : 300 - 304
  • [42] New Single Phase Multilevel Inverter Topology with Reduced Number of Switches
    Malathy, S.
    Ramaprabha, R.
    [J]. 2016 3RD INTERNATIONAL CONFERENCE ON ELECTRICAL ENERGY SYSTEMS (ICEES), 2016, : 139 - 144
  • [43] New Cascaded Multilevel Inverter Topology with Reduced Number of Switches and Sources
    Hosseini, Seyed Hossein
    Farakhor, Amir
    Haghighian, Saeideh Khadem
    [J]. 2013 8TH INTERNATIONAL CONFERENCE ON ELECTRICAL AND ELECTRONICS ENGINEERING (ELECO), 2013, : 97 - 101
  • [44] A New Multilevel Inverter with Alleviated Number of Switches for Renewable Energy Applications
    Mondol, M. H.
    Biswas, S. P.
    Roy, T. K.
    [J]. 2020 IEEE REGION 10 SYMPOSIUM (TENSYMP) - TECHNOLOGY FOR IMPACTFUL SUSTAINABLE DEVELOPMENT, 2020, : 961 - 964
  • [45] Design of new asymmetrical cascaded multilevel inverter with reduced number of switches
    Bharathi, Chettiar Ramachandra
    [J]. European Journal of Electrical Engineering, 2019, 21 (06) : 547 - 552
  • [46] A Cascaded Asymmetric Multilevel Inverter with Minimum Number of Switches for Solar Applications
    Draxe, Kaustubh P.
    Ranjana, Mahajan Sagar Bhaskar
    Pandav, Kiran M.
    [J]. 2014 POWER AND ENERGY SYSTEMS CONFERENCE: TOWARDS SUSTAINABLE ENERGY, 2014,
  • [47] Novel symmetric and asymmetric topology of multilevel inverter with reduced number of switches
    Reddy, Kelam Bala Muralidhar
    Pattnaik, Swapnajit
    [J]. 2017 IEEE INTERNATIONAL CONFERENCE ON INDUSTRIAL TECHNOLOGY (ICIT), 2017, : 165 - 170
  • [48] A New Cascaded Multilevel Inverter Topology with Minimum Number of Conducting Switches
    Mohamad, A. Syukri
    Mariun, Norman
    Sulaiman, Nasri
    Radzi, M. Amran M.
    [J]. 2014 IEEE INNOVATIVE SMART GRID TECHNOLOGIES - ASIA (ISGT ASIA), 2014, : 164 - 169
  • [49] Comparison of Symmetrical and Asymmetrical Multilevel Inverter Topologies with Reduced Number of Switches
    Rani, P. Sudha
    Prasadarao, V. S. K.
    Subbarao, Koppineni R. N. V.
    [J]. 2014 International Conference on Smart Electric Grid (ISEG), 2014,
  • [50] A New Topology of Multilevel Inverter with Reduced Number of Switches and Increased Efficiency
    Sukanya, V
    Mukundan, Nirmal C. M.
    Jayaprakash, P.
    Asokan, O., V
    [J]. 2018 IEEE INTERNATIONAL CONFERENCE ON POWER ELECTRONICS, DRIVES AND ENERGY SYSTEMS (PEDES), 2018,
12345