Design of new asymmetrical cascaded multilevel inverter with reduced number of switches

被引：0
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作者：
Bharathi, Chettiar Ramachandra [1 ]
机构：
[1] Department of ECE, Vel Tech Rangarajan Dr. Sagunthala R and D Institute of Science and Technology, Avadi, Chennai,Tamil Nadu,600054, India
来源：
European Journal of Electrical Engineering | 2019年 / 21卷 / 06期
关键词：
D O I：
10.18280/ejee.210609
中图分类号：
学科分类号：
摘要：
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页码：547 / 552
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