Flash-Based Nonvolatile Programmable Switch for Low-Power and High-Speed FPGA by Adjacent Integration of MONOS/Logic and Novel Programming Scheme

被引：0

作者：

Zaitsu, Koichiro ^{[1
]}

Tatsumura, Kosuke ^{[1
]}

Matsumoto, Mari ^{[1
]}

Oda, Masato ^{[1
]}

Fujita, Shinobu ^{[1
]}

Yasuda, Shinichi ^{[1
]}

机构：

[1] Toshiba Co Ltd, Corp R&D Ctr, Adv LSI Technol Lab, Saiwai Ku, 1 Komukai Toshiba Cho, Kawasaki, Kanagawa 2128582, Japan

来源：

2014 SYMPOSIUM ON VLSI TECHNOLOGY (VLSI-TECHNOLOGY): DIGEST OF TECHNICAL PAPERS | 2014年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Novel nonvolatile programmable switch for low-power and high-speed FPGA where MONOS flash is adjacently integrated to CMOS logic is demonstrated. The MONOS transistors (MTrs.) and low-voltage switching transistors (SwTrs.) are fabricated close to each other without deteriorating each performance. Furthermore, memory programming scheme is optimized to realize selective writing with no damage in the SwTrs. MONOS-based configuration memory has a half area of conventional SRAM, and it can be placed in each block in FPGA. That enables efficient power gating (PG) that offers low-power FPGA operation.

引用

页数：2

共 49 条

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