Implementation of Synaptic Device Using Various High-k Gate Dielectric Stacks

被引：5
|
作者：
Seo, Young-Tak
Park, Min-Kyu
Bae, Jong-Ho
Park, Byung-Gook
Lee, Jong-Ho [1 ]
机构：
[1] Seoul Natl Univ, Dept Elect & Comp Engn, Seoul 031326, South Korea
来源：
JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY | 2020年 / 20卷 / 07期
关键词：
Synaptic Device; Field-Effect Transistor (FET); High-k Material; Paired-Pulse Facilitation (PPF); Short-Term Plasticity (STP); Long-Term Plasticity (LTP); MEMORY; PLASTICITY; NETWORK; CIRCUIT;
D O I：
10.1166/jnn.2020.17788
中图分类号：
O6 [化学];
学科分类号：
0703 ;
摘要：
We investigate the characteristics of short-term and long-term synaptic plasticity in a Si-based field-effect transistor (FET)-type memory device. An Al2O3/HfO2/Si3N4/SiO2 gate dielectric stack is used to realize short-term and long-term plasticity (STP/LTP). Si3N4 and HfO2 layers are designed to charge trap layer for synaptic device. The mechanism of STP and LTP operation is analyzed by considering the device response to the potentiation and depression pulses and retention measurement of the memory functionality. To investigate the STP operation, paired pulse facilitation (PPF) measurement is performed. The retention characteristic is also studied to validate the LTP property of the device. By investigating a device with an Al2O3/HfO2/Si3N4 stack as a control device, it is shown that the Al2O3/HfO2/Si3N4/SiO2 stack device is suitable for a synaptic device in neuromorphic systems.
引用
收藏
页码：4292 / 4297
页数：6
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