High-Speed Pseudo-CMOS Circuits Using Bulk Accumulation a-IGZO TFTs

被引：57

作者：

Chen, Yuanfeng ^{[1
]}

Geng, Di ^{[1
]}

Mativenga, Mallory ^{[1
]}

Nam, Hyoungsik ^{[1
]}

Jang, Jin ^{[1
]}

机构：

[1] Kyung Hee Univ, Dept Informat Display, Adv Display Res Ctr, Seoul 130701, South Korea

来源：

IEEE ELECTRON DEVICE LETTERS | 2015年 / 36卷 / 02期

关键词：

a-IGZO TFTs; bulk accumulation; pseudo-CMOS; ring oscillator; THIN-FILM TRANSISTORS; GATE OFFSET STRUCTURE; ILLUMINATION; INSTABILITY;

D O I：

10.1109/LED.2014.2379700

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We propose a way to achieve high-speed circuits with dual-gate (DG) bulk-accumulation back-channel-etched (BCE) amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs) using the pseudo-CMOS structure. The DG BCE a-IGZO TFTs exhibit field-effect mobility (mu(FE)), threshold voltage (V-th), and subthreshold swing of 30 +/- 3 cm(2)/Vs, 2 +/- 0.5 V, and 120 +/- 30 mV/decade, respectively. For input voltage (V-DD) of 20 V, seven-stage pseudo-CMOS ring oscillators implemented with the BCE bulk-accumulation a-IGZO TFTs show oscillation frequency of 6.51 MHz, which corresponds to a propagation delay time of 11 ns/stage and is faster than the 17 ns/stage delay of the fastest single-gate-driven ratioed coplanar a-IGZO TFT circuits.

引用

页码：153 / 155

页数：3

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