Low-temperature transport characteristics and quantum-confinement effects in gate-all-around Si-nanowire N-MOSFET

被引:33
|
作者
Rustagi, Subhash C. [1 ]
Singh, N. [1 ]
Lim, Y. F. [1 ]
Zhang, G. [1 ]
Wang, S. [1 ]
Lo, G. Q. [1 ]
Balasubramanian, N. [1 ]
Kwong, D.-L. [1 ]
机构
[1] Inst Microelect, Singapore 117865, Singapore
关键词
carrier transport; gate all around; low temperature; MOSFET; silicon nanowire (SiNW);
D O I
10.1109/LED.2007.904890
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Gate-all-around n-MOSFETs with Si-nanowire (similar to 7 nm) as the channel body are fabricated and characterized for their low-temperature behavior (similar to 5 K to 295 K). I-DS-V-GS characteristics at low V-DS (similar to 50 mV) exhibit a decrease in current with decreasing temperature in strong inversion up to about similar to 200 K. However, at high V-DS, drain current reverts to typical temperature behavior, i.e., I-DS increases with the reducing temperature due to the increase in phonon-limited mobility (mu(ph)). It is inferred that, at low VDS, the enhancement in mu(ph) at a reduced temperature could be possibly masked by the intersubband scattering on account of subband splitting due to quantum-confinement effects as indicated by subband calculations for nanowire structures.
引用
收藏
页码:909 / 912
页数:4
相关论文
共 50 条
  • [31] Performance Limit of Gate-All-Around Si Nanowire Field-Effect Transistors: An Ab Initio Quantum Transport Simulation
    Liu, Shiqi
    Li, Qiuhui
    Yang, Chen
    Yang, Jie
    Xu, Lin
    Xu, Linqiang
    Ma, Jiachen
    Li, Ying
    Fang, Shibo
    Wu, Baochun
    Dong, Jichao
    Yang, Jinbo
    Lu, Jing
    [J]. PHYSICAL REVIEW APPLIED, 2022, 18 (05)
  • [32] Short Channel Effects Suppression in a Dual-Gate Gate-All-Around Si Nanowire Junctionless nMOSFET
    Rony, M. W.
    Bhowmik, Pankaj
    Myler, Harley R.
    Mondol, Provakar
    [J]. 2016 9TH INTERNATIONAL CONFERENCE ON ELECTRICAL AND COMPUTER ENGINEERING (ICECE), 2016, : 538 - 541
  • [33] Uniaxial Strain Effects on Electron Ballistic Transport in Gate-All-Around Silicon Nanowire MOSFETs
    Zhang, Lining
    Lou, Haijun
    He, Jin
    Chan, Mansun
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2011, 58 (11) : 3829 - 3836
  • [34] Characteristics of Gate-All-Around Twin Poly-Si Nanowire Thin-Film Transistors
    Sheu, Jeng-Tzong
    Huang, Po-Chun
    Sheu, Tzu-Shiun
    Chen, Chen-Chia
    Chen, Lu-An
    [J]. IEEE ELECTRON DEVICE LETTERS, 2009, 30 (02) : 139 - 141
  • [35] Low-temperature atomic-level trimming on Ge interfused surface for gate-all-around Si nanosheets transistors
    Sang, Guan-Qiao
    Jiang, Ren-Jie
    Wei, Yan-Zhao
    Li, Qing-Kun
    Zhang, Mei-He
    Yao, Jia-Xin
    Lu, Yi-Hong
    Cao, Lei
    Li, Jun-Feng
    Qin, Xu-Lei
    Zhang, Qing-Zhu
    Yin, Hua-Xiang
    [J]. RARE METALS, 2024,
  • [36] Low-temperature atomic-level trimming on Ge interfused surface for gate-all-around Si nanosheets transistors
    GuanQiao Sang
    RenJie Jiang
    YanZhao Wei
    QingKun Li
    MeiHe Zhang
    JiaXin Yao
    YiHong Lu
    Lei Cao
    JunFeng Li
    XuLei Qin
    QingZhu Zhang
    HuaXiang Yin
    [J]. Rare Metals, 2024, 43 (12) : 6516 - 6524
  • [37] Temperature-dependent characteristics of cylindrical gate-all-around twin silicon nanowire MOSFETs (TSNWFETs)
    Cho, Keun Hwi
    Suk, Sung Dae
    Yeoh, Yun Young
    Li, Ming
    Yeo, Kyoung Hwan
    Kim, Dong-Won
    Park, Donggun
    Lee, Won-Seong
    Jung, Young Chai
    Hong, Byung Hak
    Hwang, Sung Woo
    [J]. IEEE ELECTRON DEVICE LETTERS, 2007, 28 (12) : 1129 - 1131
  • [38] Orientation and Shape Effects on Ballistic Transport Properties in Gate-All-Around Rectangular Germanium Nanowire nFETs
    Mori, Seigo
    Morioka, Naoya
    Suda, Jun
    Kimoto, Tsunenobu
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2013, 60 (03) : 944 - 950
  • [39] vfTLP Characteristics of ESD Diodes in Bulk Si Gate-All-Around Vertically Stacked Horizontal Nanowire Technology
    Chen, Shih-Hung
    Hellings, Geert
    Scholz, Mirko
    Linten, Dimitri
    Mertens, Hans
    Ritzenthaler, Romain
    Boschke, Roman
    Groeseneken, Guido
    Mocuta, Anda
    Horiguchi, Naoto
    [J]. 2017 39TH ELECTRICAL OVERSTRESS/ELECTROSTATIC DISCHARGE SYMPOSIUM (EOS/ESD), 2017,
  • [40] Size-Dependent-Transport Study of In0.53Ga0.47As Gate-All-Around Nanowire MOSFETs: Impact of Quantum Confinement and Volume Inversion
    Gu, Jiangjiang J.
    Wu, Heng
    Liu, Yiqun
    Neal, Adam T.
    Gordon, Roy G.
    Ye, Peide D.
    [J]. IEEE ELECTRON DEVICE LETTERS, 2012, 33 (07) : 967 - 969