Test Sets for Robust Path Delay Fault Testing on Two-Rail Logic Circuits

被引:1
|
作者
Namba, Kazuteru [1 ]
Ito, Hideo [1 ]
机构
[1] Chiba Univ, Grad Sch Adv Integrat Sci, Chiba 2638522, Japan
关键词
Two-rail logic circuit; monotone function; path delay fault testing; testability; overtesting; SOFT ERRORS; DESIGN;
D O I
10.1109/TC.2010.230
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The significance of redundant technologies for improving dependability and delay fault testability are growing. So, delay fault testing on two-rail logic circuits well known as a class of redundant technologies will become important. Two-rail logic circuits can be efficiently tested by noncodeword vector pairs. However, noncodeword vector pairs may sensitize some faults which affect neither normal operation nor strongly fault secure property of the two-rail logic circuits. It means that testing with noncodeword vector pairs may be overtesting. This paper presents a construction of robust path delay fault test sets for two-rail logic circuits. The proposed test sets do not lead to the overtesting. The amounts of test data for the proposed test sets are, on average, 28.2 percent less than those for the test sets, which are obtained by the existing construction for unate circuits and lead to the overtesting.
引用
收藏
页码:1459 / 1470
页数:12
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