Single-chip MPEG-2 422P@HL CODEC LSI with multichip configuration for large scale processing beyond HDTV level

被引：6

作者：

Iwasaki, Hiroe ^{[1
]}

Naganuma, Jiro ^{[1
]}

Nitta, Koyo ^{[1
]}

Nakamura, Ken ^{[1
]}

Yoshitome, Takeshi ^{[1
]}

Ogura, Mitsuo ^{[1
]}

Nakajima, Yasuyulci ^{[1
]}

Tashiro, Yutaka ^{[1
]}

Onishi, Takayuki ^{[1
]}

Ikeda, Mitsuo ^{[1
]}

Minami, Toshihiro ^{[1
]}

Endo, Makoto ^{[1
]}

Yashima, Yoshiyuki ^{[1
]}

机构：

[1] NTT Corp, NTT Cyber Space Labs, Kanagawa 2390847, Japan

来源：

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS | 2007年 / 15卷 / 09期

关键词：

embedded system; high performance; MPEG-2; CODEC; system-on-chips;

D O I：

10.1109/TVLSI.2007.902212

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper proposes a new architecture for VASA, a single-chip MPEG-2 422P@HL CODEC LSI with multichip configuration for large scale processing beyond the HDTV level, and demonstrates its flexibility and usefulness. VASA is the world's first single-chip full-specs MPEG-2 422P@HL CODEC LSI with a multichip configuration. An LSI was successfully fabricated using the 0.13-mu m eight-metal CMOS process. The architecture not only provides an MPEG-2 422P@HL CODEC but also large scale processing beyond the HDTV level for digital cinema and multiview/-angled live TV applications with a multichip configuration. The VASA implementations will lead to a new dimension in future high-quality, high-resolution digital multimedia entertainment.

引用

页码：1055 / 1059

页数：5

共 11 条

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Ogura, M
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