A 99-mm2 0.7-w single-chip MPEG-2 422P@ML video, audio, and system encoder with a 64-Mb embedded DRAM for portable 422P@HL encoder system

被引:11
|
作者
Kumaki, S
Takata, H
Ajioka, Y
Ooishi, T
Ishihara, K
Hanami, A
Tsuji, T
Watanabe, T
Morishima, C
Yoshizawa, T
Sato, H
Hattori, S
Koshio, A
Tsukamoto, K
Matsumura, T
机构
[1] Mitsubishi Electr Corp, Informat Technol R&D Ctr, Kanagawa 2478501, Japan
[2] Matsushita Elect Corp, Semicond Co, ULSI Proc Technol Dev Ctr, Kyoto 6018413, Japan
关键词
embedded DRAM; HDTV; MPEG-2; video coding;
D O I
10.1109/4.987099
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A scalable single-chip 422P@ML MPEG-2 video, audio, and system encoder LSI for portable 422P@HL system is described. The encoder LSI is implemented using 0.13-mum embedded DRAM technology. It integrates 3-M logic gates and 64-Mb DRAM in an area of 99-mm(2). The power consumption is suppressed to 0.7 W by adopting a low-power DRAM core. It performs real-time 422P@ML video encoding, audio encoding, and system encoding with no external DRAM. Furthermore, the encoder LSI realizes a 422P@HL video encoder with multichip configuration, due to its scalable architecture. This results in a PC-card size 422P@HL encoder for portable HDTV codec system.
引用
收藏
页码:450 / 454
页数:5
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