Characterization and Reliability of Gate-All-Around Poly-Si TFTs With Multi-Nanowire Channels

The electrical characteristics and reliability of n-type gate-all-around (GAA) polycrystalline silicon (poly-Si) thin-film transistors (TFTs) with multi-nanowire channels are investigated. The multi-nanowire channels are fabricated by the spacer formation technique without any advanced lithography technology. And the GAA structure is constructed after the suspended nanowire is conformally deposited by the gate insulator and in-situ doped poly-Si gate in sequence. Due to the completely surrounding gate, the original electrical characteristics of GAA poly-Si TFTs are superior to that of traditional planar poly-Si TFTs, resulting from the improvement of gate controllability in the short dimensional TFTs. Lower threshold voltage, higher driving current and the suppression of drain-induced barrier lowering (DIBL) and kink effects are exhibited for the GAA poly-Si TFTs with multi-nanowire channels. However, owing to the enlargement of electric field of a spacer with three sharp corners, the GAA poly-Si TFTs suffer from severer hot carrier effect than planar TFTs. No matter what dc or ac hot carrier stress, the degradation of device's electrical parameters of GAA poly-Si TFTs is larger than that of conventional planar poly-Si TFTs.