Novel gate-all-around poly-Si TFTs with multiple nanowire channels

被引:49
|
作者
Liao, Ta-Chuan [1 ,2 ]
Tu, Shih-Wei [1 ,2 ]
Yu, Ming H. [1 ,2 ]
Lin, Wei-Kai [1 ,2 ]
Liu, Cheng-Chin [1 ,2 ]
Chang, Kuo-Jui [1 ,2 ]
Tai, Ya-Hsiang [3 ]
Cheng, Huang-Chung [1 ,2 ]
机构
[1] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu 300, Taiwan
[2] Natl Chiao Tung Univ, Inst Elect, Hsinchu 300, Taiwan
[3] Natl Chiao Tung Univ, Display Inst, Hsinchu 300, Taiwan
关键词
gate-all-around (GAA); nanowire; poly-Si; thin-film transistors (TFTs); three-dimensional (3-D) device;
D O I
10.1109/LED.2008.2001176
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The novel gate-all-around (GAA) poly-Si thin-film transistors (TFTs) with multiple nanowire channels (MNCs) have been, for the first time, fabricated using a simple process to demonstrate high-performance electrical characteristics and high immunity to short-channel effects (SCEs). The nanowire channel with high body-thickness-to-width ratio (T-Fin/W-Fin), which is approximately equal to one, was realized only with a sidewall-spacer formation. Moreover, the unique suspending MNCs were also achieved to build the GAA structure. The resultant GAA-MNC TFTs showed outstanding three-dimensional (3-D) gate controllability and excellent electrical characteristics, which revealed a high on/off current ratio (> 10(8)), a low threshold voltage, a steep subthreshold swing, a near-free drain-induced barrier lowering, as well as an excellent SCE suppression. Therefore, such high-performance GAA-MNC TFTs are very suitable for applications in system-on-panel and 3-D circuits.
引用
收藏
页码:889 / 891
页数:3
相关论文
共 50 条
  • [1] Gate Bias Stresses of Gate-All-Around Poly-Si TFTs With Multiple Nanowire Channels
    Kang, Tsung-Kuei
    Liao, Ta-Chuan
    Wang, Chun-Kai
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2012, 59 (08) : 2173 - 2179
  • [2] Advanced gate-all-around fin-like poly-Si TFTs with multiple nanowire channels
    Tu, Shih-Wei
    Liao, Ta-Chuan
    Lin, Wei-Kai
    Liu, Cheng-Chin
    Tai, Ya-Hsiang
    Cheng, Huang-Chung
    Chien, Feng-Tso
    Chen, Chii-Wen
    Chen, Wan-Lu
    [J]. 2008 SID INTERNATIONAL SYMPOSIUM, DIGEST OF TECHNICAL PAPERS, VOL XXXIX, BOOKS I-III, 2008, 39 : 1270 - +
  • [3] Gate-All-Around Poly-Si TFTs With Single-Crystal-Like Nanowire Channels
    Kang, Tsung-Kuei
    Liao, Ta-Chuan
    Lin, Chia-Min
    Liu, Han-Wen
    Wang, Fang-Hsing
    Cheng, Huang-Chung
    [J]. IEEE ELECTRON DEVICE LETTERS, 2011, 32 (09) : 1239 - 1241
  • [4] Characterization and Reliability of Gate-All-Around Poly-Si TFTs With Multi-Nanowire Channels
    Liu, Han-Wen
    Chiou, Si-Ming
    Hung, Chung-En
    Wang, Fang-Hsing
    [J]. THIN FILM TRANSISTORS 10 (TFT 10), 2010, 33 (05): : 197 - 204
  • [5] Gate-all-around poly-Si nanowire junctionless thin-film transistors with multiple channels
    Tso, Chia-Tsung
    Liu, Tung-Yu
    Sheu, Jeng-Tzong
    [J]. JAPANESE JOURNAL OF APPLIED PHYSICS, 2015, 54 (06)
  • [6] Gate-all-around floating-gate memory device with triangular poly-Si nanowire channels
    Tsai, Jung-Ruey
    Lee, Ko-Hui
    Lin, Horng-Chih
    Huang, Tiao-Yuan
    [J]. JAPANESE JOURNAL OF APPLIED PHYSICS, 2014, 53 (04)
  • [7] Characteristics of Gate-All-Around Junctionless Poly-Si TFTs With an Ultrathin Channel
    Chen, Hung-Bin
    Chang, Chun-Yen
    Lu, Nan-Heng
    Wu, Jia-Jiun
    Han, Ming-Hung
    Cheng, Ya-Chi
    Wu, Yung-Chun
    [J]. IEEE ELECTRON DEVICE LETTERS, 2013, 34 (07) : 897 - 899
  • [8] Novel Sub-10-nm Gate-All-Around Si Nanowire Channel Poly-Si TFTs With Raised Source/Drain
    Lu, Yi-Hsien
    Kuo, Po-Yi
    Wu, Yi-Hong
    Chen, Yi-Hsuan
    Chao, Tien-Sheng
    [J]. IEEE ELECTRON DEVICE LETTERS, 2011, 32 (02) : 173 - 175
  • [9] Gate-All-Around Single-Crystal-Like Poly-Si Nanowire TFTs With a Steep-Subthreshold Slope
    Liu, Tung-Yu
    Lo, Shen-Chuan
    Sheu, Jeng-Tzong
    [J]. IEEE ELECTRON DEVICE LETTERS, 2013, 34 (04) : 523 - 525
  • [10] Fabrication and RTN Characteristics of Gate-All-Around Poly-Si Junctionless Nanowire Transistors
    Yang, Chen-Chen
    Chen, Yung-Chen
    Lin, Horng-Chih
    Chang, Ruey-Dar
    Li, Pei-Wen
    Huang, Tiao-Yuan
    [J]. 2016 IEEE SILICON NANOELECTRONICS WORKSHOP (SNW), 2016, : 64 - 65