Compact model generation for on-chip transmission lines

被引:12
|
作者
Kim, T [1 ]
Li, XY [1 ]
Allstot, DJ [1 ]
机构
[1] Univ Washington, Dept Elect Engn, Seattle, WA 98195 USA
基金
美国国家科学基金会;
关键词
ABCD matrix; coplanar waveguide; microstrip line; neural network; transmission line; transmission-line model;
D O I
10.1109/TCSI.2003.822397
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
An approach for the fast and accurate generation of compact distributed circuit models for on-chip transmission,lines on lossy silicon substrates is presented. Using a novel ABCD matrix partitioning procedure, accurate distributed circuit models are extracted from scattering parameters obtained from measurements and calibrated full-wave electromagnetic simulations for a small set of transmission-line geometries spanning ranges of design parameter values. A feedforward artificial neural network is trained using the extracted results, and applied to generate accurate compact models for arbitrary values within the bounds of the training ranges. Consequently, the model generation time is greatly reduced compared to conventional approaches by exploiting the interpolation capabilities of the neural network. The compact model generator is fully compatible with HSPICE and SPECTRE-RF and is easily incorporated into parasitic-aware RF circuit design and optimization tools.
引用
收藏
页码:459 / 470
页数:12
相关论文
共 50 条
  • [1] A Scalable Equivalent Circuit Model for Gan On-Chip Transmission Lines
    Zhang, Ming-hui
    He, Wei-liang
    Wang, Han-sheng
    Tang, Lu
    [J]. PROCEEDINGS OF THE INTERNATIONAL CONFERENCE ON COMPUTER NETWORKS AND COMMUNICATION TECHNOLOGY (CNCT 2016), 2016, 54 : 432 - 438
  • [2] On-chip generation and transmission of single photons
    Kalliakos, Sokratis
    Schwagmann, Andre
    Farrer, Ian
    Griffiths, Jonathan P.
    Jones, Geb A. C.
    Ritchie, David A.
    Shields, Andrew J.
    [J]. PHYSICS AND SIMULATION OF OPTOELECTRONIC DEVICES XXI, 2013, 8619
  • [3] Pulse Generation for On-chip Data Transmission
    Hollis, Simon J.
    [J]. PROCEEDINGS OF THE 2009 12TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN, ARCHITECTURES, METHODS AND TOOLS, 2009, : 303 - 310
  • [4] A Simple Model for On-Chip Microstrip Transmission Lines in Millimeter Wave Circuits
    Shafie, Shrouk
    El-Sabagh, Mona
    Dessouky, Mohamed
    Shafee, Marwah
    Hammouda, Sherif
    Hegazy, Hazem
    [J]. 2016 28TH INTERNATIONAL CONFERENCE ON MICROELECTRONICS (ICM 2016), 2016, : 121 - 124
  • [5] A library compatible driver output model for on-chip RLC transmission lines
    Agarwal, K
    Sylvester, D
    Blaauw, D
    [J]. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2004, 23 (01) : 128 - 136
  • [6] Using Transmission Lines for Global On-Chip Communication
    Carpenter, Aaron
    Hu, Jianyun
    Xu, Jie
    Huang, Michael
    Wu, Hui
    Liu, Peng
    [J]. IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS, 2012, 2 (02) : 183 - 193
  • [7] An Investigation on The Optimum Termination for On-Chip Transmission Lines
    Picha, Sepideh Gholipour
    Sarafi, Sahar
    Koberle, Michael
    Sturm, Johannes
    [J]. 2021 29TH TELECOMMUNICATIONS FORUM (TELFOR), 2021,
  • [8] Analysis of the parameter extraction for on-chip transmission lines
    Yang, Shuo
    Fu, Jun
    Zhang, Lijun
    Liu, Linlin
    Wang, Quan
    Feng, Yueyi
    [J]. IEICE ELECTRONICS EXPRESS, 2020, 17 (18):
  • [9] Clock distribution networks with on-chip transmission lines
    Mizuno, M
    Anjo, K
    Sumi, Y
    Fukaishi, M
    Wakabayashi, H
    Mogami, T
    Horiuchi, T
    Yamashina, M
    [J]. PROCEEDINGS OF THE IEEE 2000 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE, 2000, : 3 - 5
  • [10] Compact model for on-chip spiral inductors
    Wang, JN
    Rowland, J
    Zhu, XY
    Hutchens, C
    Zhang, YM
    [J]. 2004 IEEE REGION 5 CONFERENCE: ANNUAL TECHNICAL AND LEADERSHIP WORKSHOP, 2004, : 99 - 101