40Gbit/s, fully-integrated 1:2 demultiplexer IC using InAlAs/InGaAs/InP HEMTs

被引:3
|
作者
Otsuji, T
Yoneyama, M
Imai, Y
Enoki, T
Umeda, Y
机构
[1] NIPPON TELEGRAPH & TEL PUBL CORP, OPT NETWORK SYST LABS, YOKOSUKA, KANAGAWA 14301, JAPAN
[2] NIPPON TELEGRAPH & TEL PUBL CORP, ELECT TECHNOL CORP, ATSUGI, KANAGAWA 24301, JAPAN
关键词
demultiplexing equipment; optical communication equipment;
D O I
10.1049/el:19970942
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 40Gbit/s, fully-integrated 1:2 demultiplexer IC using InAlAs/InGaAs/InP HEMTs is reported. The IC integrates the full Functionality for 40Gbit/s data and 40GHz regenerated clock inputs, including output bit alignment.
引用
收藏
页码:1409 / 1410
页数:2
相关论文
共 50 条
  • [41] A 120-Gbit/s 1.27-W 520-mVpp 2:1 Multiplexer IC Using Self-Aligned InP/InGaAs/InP DHBTs with Emitter Mesa Passivation
    Arayashiki, Yutaka
    Ohkubo, Yukio
    Matsumoto, Taisuke
    Amano, Yoshiaki
    Takagi, Akio
    Matsuoka, Yutaka
    [J]. IEICE TRANSACTIONS ON ELECTRONICS, 2010, E93C (08): : 1273 - 1278
  • [42] 320Gbit/s WDM repeaterless transmission using fully encoded 40Gbit/s optical duobinary channels with dispersion tolerance of 380ps/nm
    Yonenaga, K
    Miyamoto, Y
    Toba, H
    Murata, K
    Yoneyama, M
    Yamane, Y
    Miyazawa, H
    [J]. ELECTRONICS LETTERS, 2001, 37 (02) : 109 - 110
  • [43] S-band low noise amplifier using 1 mu m InGaAs/InAlAs/InP pHEMT
    Hamaizia, Z.
    Sengouga, N.
    Yagoub, M. C. E.
    Missous, M.
    [J]. JOURNAL OF SEMICONDUCTORS, 2012, 33 (02)
  • [44] A fast low-power 4x4 switch IC using InP HEMTs for 10-Gbit/s systems
    Kamitsuna, H
    Yamane, Y
    Tokumitsu, M
    Sugahara, H
    Muraguchi, M
    [J]. 2004 IEEE CSIC SYMPOSIUM, TECHNICAL DIGEST 2004: 26TH ANNIVERSARY: COMPOUNDING YOUR CHIPS IN MONTEREY, 2004, : 97 - 100
  • [45] InP DHBT-based 1:2 DEMUX IC operating at up to 120 Gbit/s
    Makon, R. E.
    Driad, R.
    Loesch, R.
    Rosenzweig, J.
    Schlechtweg, M.
    Ambacher, O.
    [J]. ELECTRONICS LETTERS, 2009, 45 (25) : 1340 - 1341
  • [46] A 120-Gbit/s 520-mVPP MULTIPLEXER IC USING 1-μm SELF-ALIGNED InP/InGaAs/InP DHBT WITH EMITTER MESA PASSIVATION LEDGE
    Arayashiki, Y.
    Ohkubo, Y.
    Matsumoto, T.
    Koji, T.
    Amano, Y.
    Takagi, A.
    Matsuoka, Y.
    [J]. 2010 22ND INTERNATIONAL CONFERENCE ON INDIUM PHOSPHIDE AND RELATED MATERIALS (IPRM), 2010,
  • [47] 10-GB/S HIGH-SPEED MONOLITHICALLY INTEGRATED PHOTORECEIVER USING INGAAS P-I-N PD AND PLANAR DOPED INALAS/INGAAS HEMTS
    AKAHORI, Y
    AKATSU, Y
    KOHZEN, A
    YOSHIDA, J
    [J]. IEEE PHOTONICS TECHNOLOGY LETTERS, 1992, 4 (07) : 754 - 756
  • [48] Highly reliable high performance waveguide-integrated InP/InGaAs pin photodiodes for 40 Gbit/s fibre-optical communication application
    Wang, G
    Yoneda, Y
    Hanawa, I
    Aona, H
    Araki, K
    Takechi, M
    Momma, Y
    Odagawa, T
    Fujii, T
    Sato, K
    Kobayashi, M
    [J]. ELECTRONICS LETTERS, 2003, 39 (15) : 1147 - 1149
  • [49] 40GBIT/S ALL-OPTICAL DEMULTIPLEXING USING A MONOLITHICALLY INTEGRATED MACH-ZEHNDER INTERFEROMETER WITH SEMICONDUCTOR-LASER AMPLIFIERS
    JAHN, E
    AGRAWAL, N
    ARBERT, M
    EHRKE, HJ
    FRANKE, D
    LUDWIG, R
    PIEPER, W
    WEBER, HG
    WEINERT, CM
    [J]. ELECTRONICS LETTERS, 1995, 31 (21) : 1857 - 1858
  • [50] 20 Gbit/s 1:2 demultiplexer of low-power using 0.18 μm CMOS
    Institute of RF-OE-ICs, Southeast University, Nanjing 210096, China
    [J]. J. Southeast Univ. Engl. Ed., 2007, 1 (39-42):