共 50 条
- [1] A Reduced Memory MPEG-2 Decoder for Compressed HD Video [J]. 2016 3RD INTERNATIONAL CONFERENCE ON SYSTEMS AND INFORMATICS (ICSAI), 2016, : 954 - 958
- [2] A high speed and efficient architecture of VLD for AVS HD video decoder [J]. 2012 PICTURE CODING SYMPOSIUM (PCS), 2012, : 377 - 380
- [3] A reduced memory MPEG video decoder [J]. 2004 IEEE INTERNATIONAL SYMPOSIUM ON CONSUMER ELECTRONICS, PROCEEDINGS, 2004, : 31 - 35
- [4] VLD Design for AVS Video Decoder [J]. WKDD: 2009 SECOND INTERNATIONAL WORKSHOP ON KNOWLEDGE DISCOVERY AND DATA MINING, PROCEEDINGS, 2009, : 648 - 651
- [5] A HIGHLY EFFICIENT EXTERNAL MEMORY INTERFACE ARCHITECTURE FOR AVS HD VIDEO ENCODER [J]. ELECTRONIC PROCEEDINGS OF THE 2013 IEEE INTERNATIONAL CONFERENCE ON MULTIMEDIA AND EXPO WORKSHOPS (ICMEW), 2013,
- [7] AVS VIDEO DECODER ON MULTICORE SYSTEMS: OPTIMIZATIONS AND TRADEOFFS [J]. 2011 IEEE INTERNATIONAL CONFERENCE ON MULTIMEDIA AND EXPO (ICME), 2011,
- [8] Memory interface design for AVS HD video encoder with Level C plus coding order [J]. IEICE ELECTRONICS EXPRESS, 2017, 14 (12):
- [9] Research and Design of AVS Video Decoder Bit Rate Control [J]. ADVANCES IN ENERGY SCIENCE AND TECHNOLOGY, PTS 1-4, 2013, 291-294 : 2913 - 2916
- [10] A Proposed AVS Decoder Configuration in the Reconfigurable Video Coding Framework [J]. ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5, 2009, : 1934 - 1934