AVS video decoder system modeling and design based on SystemC

被引：0

作者：

Chen Mei Fen ^{[1
]}

Zhou Jian Yang ^{[1
]}

Liu Xiao Wei ^{[1
]}

Yin Hui Qing ^{[2
]}

机构：

[1] Xiamen Univ, Dept Elect Engn, Xiamen, Peoples R China

[2] Xiamen overseas Chinese elect corp, Xiamen, Peoples R China

来源：

2008 2ND INTERNATIONAL CONFERENCE ON ANTI-COUNTERFEITING, SECURITY AND IDENTIFICATION | 2008年

关键词：

AVS; SystemC; video decoder; system design;

D O I：

暂无

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

This paper presents the major techniques of AVS video decoder and the design methodology using the new generation system design language-SystemC. We model the AVS video decoder with SystemC on three levels. The algorithm modeling realizes the division of each module; the system schedule design adds timing sequence information, schedule information and interface design to the system; the parallel modeling between modules improves the speed of system. Through the modeling of these three levels, we have realized AVS video decoder with SystemC, which can decode AVS compressed dataflow correctly.

引用

页码：382 / +

页数：2

共 50 条

[1] VLD Design for AVS Video Decoder
Liu Wei
Chen Yong-en
[J]. WKDD: 2009 SECOND INTERNATIONAL WORKSHOP ON KNOWLEDGE DISCOVERY AND DATA MINING, PROCEEDINGS, 2009, : 648 - 651
[2] An AVS Video Decoder Design and Implementation Based On Parallel Algorithm
Sui, Chunchun
Wang, Ning
Chen, Ling
Cao, Xixin
[J]. 12TH INTERNATIONAL CONFERENCE ON ADVANCED COMMUNICATION TECHNOLOGY: ICT FOR GREEN GROWTH AND SUSTAINABLE DEVELOPMENT, VOLS 1 AND 2, 2010, : 1606 - 1609
[3] The Design of Controller in AVS Video Decoder Chip Based on Openrisc
Lv, Qian
Zhang, Jinlan
[J]. INFORMATION TECHNOLOGY APPLICATIONS IN INDUSTRY, PTS 1-4, 2013, 263-266 : 53 - 59
[4] Research and Design of AVS Video Decoder Bit Rate Control
Xiong, Jiang
Yi, Qingming
Shi, Min
[J]. ADVANCES IN ENERGY SCIENCE AND TECHNOLOGY, PTS 1-4, 2013, 291-294 : 2913 - 2916
[5] Functional Verification Based on FPGA for AVS Video Decoder
FU Fang-fang
[J]. Semiconductor Photonics and Technology, 2009, 15 (04) : 219 - 224
[6] VLD Design for AVS and H.264 Dual Standards Video Decoder
Liu Wei
Chen Yong-en
Wang Peng
[J]. 2009 5TH INTERNATIONAL CONFERENCE ON WIRELESS COMMUNICATIONS, NETWORKING AND MOBILE COMPUTING, VOLS 1-8, 2009, : 2112 - 2114
[7] AVS HDTV video decoder architecture based on HW/SW partitioning
Jia, Huizhu
Xie, Xiaodong
Gao, Wen
[J]. Jisuanji Yanjiu yu Fazhan/Computer Research and Development, 2008, 45 (03): : 510 - 518
[8] Design of Variable Length Code Decoder for AVS Based on FPGA
Li, Shenghong
Wang, Zuqiang
Jiang, Xia
[J]. 2013 INTERNATIONAL CONFERENCE ON INFORMATION SCIENCE AND TECHNOLOGY (ICIST), 2013, : 1155 - 1158
[9] A Reduced Memory AVS Decoder for Compressed HD Video
Nie, Zhengang
[J]. 2018 11TH INTERNATIONAL CONGRESS ON IMAGE AND SIGNAL PROCESSING, BIOMEDICAL ENGINEERING AND INFORMATICS (CISP-BMEI 2018), 2018,
[10] AVS VIDEO DECODER ON MULTICORE SYSTEMS: OPTIMIZATIONS AND TRADEOFFS
Krommydas, Konstantinos
Antonopoulos, Christos D.
Bellas, Nikolaos
Feng, Wu-chun
[J]. 2011 IEEE INTERNATIONAL CONFERENCE ON MULTIMEDIA AND EXPO (ICME), 2011,

← 1 2 3 4 5 →