Competitive 1T-DRAM in 28 nm FDSOI Technology for Low-Power Embedded Memory

被引：0

作者：

El Dirani, H. ^{[1
,2
]}

Bawedin, M. ^{[2
]}

Lee, K. ^{[2
]}

Parihar, M. ^{[2
]}

Mescot, X. ^{[2
]}

Fonteneau, P. ^{[1
]}

Galy, Ph. ^{[1
]}

Gamiz, F. ^{[3
]}

Kim, Y-T. ^{[4
]}

Ferrari, P. ^{[2
]}

Cristoloveanu, S. ^{[2
]}

机构：

[1] STMicroelectronics, 850 Rue Jean Monnet, F-38926 Crolles, France

[2] Umv Grenoble Alpes, IMEP LAHC, Grenoble INP Minatec, CNRS, F-38000 Grenoble, France

[3] Univ Granada, Granada, Spain

[4] KIST, Seoul, South Korea

来源：

2016 IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE (S3S) | 2016年

关键词：

SOI; FDSOI; 1T-DRAM; Z(2)-FET; low-power; SOI;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We demonstrate experimentally a capacitorless 1T-DRAM fabricated with 28 nm FDSOI. The Z(2)-FET memory cell features a large current sense margin and long retention time at T = 25 degrees C and 85 degrees C. Systematic measurements show that Z(2)-FET exhibits negligible OFF-state current at low drain/gate bias and is suitable as a low-power embedded memory.

引用

页数：2

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