Critical Technical Issues in High Voltage SiC Power Devices

被引：19

作者：

Agarwal, Anant ^{[1
]}

Burk, Al ^{[1
]}

Callanan, Robert ^{[1
]}

Capell, Craig ^{[1
]}

Das, Mrinal ^{[1
]}

Haney, Sarah ^{[1
]}

Hull, Brett ^{[1
]}

Jonas, Charlotte ^{[1
]}

O'Loughlin, Michael ^{[1
]}

O'Neill, Michael ^{[1
]}

Palmour, John ^{[1
]}

Powell, Adrian ^{[1
]}

Richmond, James ^{[1
]}

Ryu, Sei-Hyung ^{[1
]}

Stahlbush, Robert ^{[2
]}

Sumakeris, Joe ^{[1
]}

Zhang, Jon ^{[1
]}

机构：

[1] Cree Inc, 4600 Silicon Dr, Durham, NC 27703 USA

[2] Naval Res Lab, Code 6881, Washington, DC 20375 USA

来源：

SILICON CARBIDE AND RELATED MATERIALS 2007, PTS 1 AND 2 | 2009年 / 600-603卷

关键词：

High Voltage; Power Devices; MOSFET; BJT; IGBT; GTO; Stacking Fault;

D O I：

10.4028/www.scientific.net/MSF.600-603.895

中图分类号：

TQ174 [陶瓷工业]; TB3 [工程材料学];

学科分类号：

0805 ; 080502 ;

摘要：

In this paper, we review the state of the art of SiC switches and the technical issues which remain. Specifically, we will review the progress and remaining challenges associated with SiC power MOSFETs and BJTs. The most difficult issue when fabricating MOSFETs has been an excessive variation in threshold voltage from batch to batch. This difficulty arises due to the fact that the threshold voltage is determined by the difference between two large numbers, namely, a large fixed oxide charge and a large negative charge in the interface traps. There may also be some significant charge captured in the bulk traps in SiC and SiO2. The effect of recombination-induced stacking faults (SFs) on majority carrier mobility has been confirmed with 10 kV Merged PN Schottky (MPS) diodes and MOSFETs. The same SFs have been found to be responsible for degradation of BJTs.

引用

页码：895 / +

页数：2

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