Some Critical Materials and Processing Issues in SiC Power Devices

There has been a rapid improvement in SiC materials and power devices during the last few years. However, the materials community has overlooked some critical issues, which may threaten the emergence of SiC power devices in the coming years. Some of these pressing materials and processing issues will be presented in this paper. The first issue deals with the possibility of process-induced bulk traps in SiC immediately under the SiC/SiO2 interface, which may be involved in the reduction of effective inversion layer electron mobility in SiC metal–oxide–semiconductor field-effect transistor (MOSFETs). The second issue addresses the effect of recombination-induced stacking faults (SFs) in majority carrier devices such as MOSFETs, Schottky diodes, and junction field-effect transistors (JFETs). In the past it was assumed that the SFs only affect the bipolar devices such as PiN diodes and thyristors. However, most majority carrier devices have built-in p–n junction diodes, which can become forward biased during operation in a circuit. Thus, all high-voltage SiC devices are susceptible to this phenomenon.