Optimization and implementation on FPGA of the DCT/IDCT algorithm

被引：0

作者：

Ben Atitallah, A. ^{[1
]}

Kadionik, P. ^{[1
]}

Ghozzi, F. ^{[1
]}

Nouel, P. ^{[1
]}

Masmoudi, N. ^{[1
]}

Marchegay, Ph. ^{[1
]}

机构：

[1] Natl Engineers Sch Sfax ENIS, Lab Elect & Informat Technol, Sfax, Tunisia

来源：

2006 IEEE International Conference on Acoustics, Speech and Signal Processing, Vols 1-13 | 2006年

关键词：

D O I：

暂无

中图分类号：

O42 [声学];

学科分类号：

070206 ; 082403 ;

摘要：

this paper, we present a comparison between two methods, the modified Loeffler algorithm (11 MUL and 29 ADD) and Distributed Arithmetic, to implement the DCT/IDCT algorithm for MPEG or H.26x video compression using VHDL description language. The implementation has been achieved on Altera Stratix EP1S10 FPGA which provides a dedicated DSP blocks required for common signal processing functions. A new solution based on this DSP blocks used for to implement multipliers for the modified Loeffler algorithm in order to optimize speed and area.

引用

页码：3379 / 3382

页数：4

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