Characteristics of a Smiling Polysilicon Thin-Film Transistor

被引:7
|
作者
Lin, Jyi-Tsong [1 ]
Chang, Tzu-Feng [1 ]
Eng, Yi-Chuen [1 ]
Lin, Po-Hsieh [1 ]
Chen, Cheng-Hsin [1 ]
机构
[1] Natl Sun Yat Sen Univ, Dept Elect Engn, Kaohsiung 80424, Taiwan
关键词
Data retention time; programming window; system on panel (SOP); thin-film transistor (TFT); one-transistor dynamic random access memory (1T-DRAM); THRESHOLD VOLTAGE;
D O I
10.1109/LED.2012.2191262
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
One-transistor dynamic random access memory (1T-DRAM) thin-film transistor (TFT) could lead the revolution of system-on-panel application. However, no useful 1T-DRAM is fabricated on the polysilicon (poly-Si) thin film up to now. In this letter, we present a novel method to fabricate a smiling poly-Si TFT for 1T-DRAM applications. The experimental results show that the short-channel effects can be reduced because the smiling scheme is used to suppress the charge sharing and the source/drain-tied scheme can help to overcome the self-heating. Moreover, the device fabrication is fully compatible with current complementary metal-oxide-semiconductor (CMOS) technology.
引用
收藏
页码:830 / 832
页数:3
相关论文
共 50 条
  • [31] Carrier generation in thin-film polysilicon
    Eccleston, W
    [J]. AMORPHOUS AND HETEROGENEOUS SILICON-BASED FILMS-2002, 2002, 715 : 685 - 688
  • [32] A Novel Self-Aligned Double-Channel Polysilicon Thin-Film Transistor
    Chien, Feng-Tso
    Chen, Chii-Wen
    Lee, Tien-Chun
    Wang, Chi-Ling
    Cheng, Ching-Hwa
    Kang, Tsung-Kuei
    Chiu, Hsien-Chin
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2013, 60 (02) : 799 - 804
  • [33] H-2/O-2 PLASMA ON POLYSILICON THIN-FILM TRANSISTOR
    CHERN, HN
    LEE, CL
    LEI, TF
    [J]. IEEE ELECTRON DEVICE LETTERS, 1993, 14 (03) : 115 - 117
  • [34] Optimization of Bridged-Grain polysilicon Thin-Film Transistor (BG-TFT)
    Tassis, D.
    [J]. 2014 29TH INTERNATIONAL CONFERENCE ON MICROELECTRONICS PROCEEDINGS - MIEL 2014, 2014, : 231 - 234
  • [35] Optimizing polysilicon thin-film transistor performance with chemical-mechanical polishing and hydrogenation
    Chan, ABY
    Nguyen, CT
    Ko, PK
    Wong, M
    Kumar, A
    Sin, J
    Wong, SS
    [J]. IEEE ELECTRON DEVICE LETTERS, 1996, 17 (11) : 518 - 520
  • [36] Comparative analysis of advanced polysilicon thin-film transistor architectures for drain field relief
    Fortunato, G
    Valletta, A
    Bonfiglietti, A
    Cuscunà, M
    Gaucci, P
    Mariucci, L
    Pecora, A
    Brotherton, SD
    Ayres, JR
    [J]. POLY-SILICON THIN FILM TRANSISTOR TECHNOLOGY AND APPLICATIONS IN DISPLAYS AND OTHER NOVEL TECHNOLOGY AREAS, 2003, 5004 : 150 - 164
  • [37] A self-aligned offset polysilicon thin-film transistor using photoresist reflow
    Han, JI
    Han, CH
    [J]. IEEE ELECTRON DEVICE LETTERS, 1999, 20 (09) : 476 - 477
  • [38] Grain engineering approaches for high-performance polysilicon thin-film transistor fabrication
    Giust, GK
    Sigmon, TW
    [J]. FLAT-PANEL DISPLAY MATERIALS-1998, 1998, 508 : 55 - 65
  • [39] CONTROL OF THE PERFORMANCE OF POLYSILICON THIN-FILM TRANSISTOR BY HIGH-GATE-VOLTAGE STRESS
    DIMITRIADIS, CA
    COXON, PA
    LOWE, AJ
    STOEMENOS, J
    ECONOMOU, NA
    [J]. IEEE ELECTRON DEVICE LETTERS, 1991, 12 (12) : 676 - 678
  • [40] NUMERICAL SIMULATIONS OF ON AND OFF STATE CHARACTERISTICS OF POLYSILICON THIN-FILM TRANSISTORS
    HACK, M
    WU, IW
    LEWIS, AG
    KING, TJ
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1993, 40 (11) : 2128 - 2128