Contact Chains for FinFET Technology Characterization

被引:3
|
作者
Brozek, Tomasz [1 ]
Lam, Stephen [1 ]
Yu, Shia [1 ]
Pak, Mike K. [1 ]
Liu, Tom [1 ]
Vallishayee, Rakesh [1 ]
Yokoyama, Nobuharu [1 ]
机构
[1] PDF Solut, San Jose, CA 95110 USA
关键词
FinFET; CMOS; characterization; contacts; test structures; failure mode;
D O I
10.1109/TSM.2015.2451636
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
Electrical characterization remains a key element in technology development and manufacturing of integrated circuits. Contact chain is a well known part of the diagnostic set of test structures used across many generations of silicon processes. Implementation of such test structures becomes challenging in new technologies with 3-D devices, like FinFET. Contacts to active regions of such devices are inherently dependent on the architecture of epitaxial raised source and drain and for proper characterization require the presence of transistor gates, which set the environment for contacts. This paper describes a new type of test structure, so-called gated contact chains, developed for contact process characterization in FinFET technologies. Instead of simple chain of contacts, each structure contains a series of active devices with common gate electrode used to turn on the chain of transistors to enable measurement of chain resistance. To discriminate between chain failures caused by an open contact or by other mechanisms (e.g., bad transistor with very high threshold voltage) a series of measurement under various test conditions was performed and analysed. In order to overcome a limitation of the contact chain size and enable data collection from larger sample of contacts, we proposed to implement the gated chains in addressable arrays, increasing their density and failure rate observability. Finally, the paper presents the examples of electrical failure modes detected by those chains in FinFET process.
引用
收藏
页码:205 / 212
页数:8
相关论文
共 50 条
  • [21] FinFET Technology A Substrate Perspective
    Bu, Huming
    2011 IEEE INTERNATIONAL SOI CONFERENCE, 2011,
  • [22] FinFET Flash Memory Technology
    Liu, Y. X.
    Kamei, T.
    Matsukawa, T.
    Endo, K.
    O'uchi, S.
    Tsukada, J.
    Yamauchi, H.
    Ishikawa, Y.
    Hayashida, T.
    Sakamoto, K.
    Ogura, A.
    Masahara, M.
    DIELECTRICS FOR NANOSYSTEMS 5: MATERIALS SCIENCE, PROCESSING, RELIABILITY, AND MANUFACTURING -AND-TUTORIALS IN NANOTECHNOLOGY: MORE THAN MOORE - BEYOND CMOS EMERGING MATERIALS AND DEVICES, 2012, 45 (03): : 289 - 310
  • [23] Silicon LEDs in FinFET technology
    Piccolo, G.
    Kuindersma, P. I.
    Ragnarsson, L-A
    Hueting, R. J. E.
    Collaert, N.
    Schmitz, J.
    PROCEEDINGS OF THE 2014 44TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE (ESSDERC 2014), 2014, : 274 - 277
  • [24] Characterization of Single Event Transient in 14 nm FinFET Technology; [14 nm FinFET器件单粒子瞬态特性研究]
    Wang B.
    Shi Z.
    Yue H.
    Li H.
    Lu H.
    Yang B.
    Yuanzineng Kexue Jishu/Atomic Energy Science and Technology, 2021, 55 (12): : 2209 - 2215
  • [25] Reliability Characterization for 12 V Application Using the 22FFL FinFET Technology
    Su, C-Y
    Armstrong, M.
    Chugh, S.
    El-tanani, M.
    Greve, H.
    Li, H.
    Maksudl, M.
    Orr, B.
    Perini, C.
    Palmer, J.
    Paulson, L.
    Ramey, S.
    Waldemer, J.
    Yang, Y.
    Young, D.
    2020 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2020,
  • [26] Characteristic comparison of connected DG FINFET, TG FINFET and Independent Gate FINFET on 32 nm technology
    Tripathi, S. L.
    Mishra, Ramanuj
    Mishra, R. A.
    2012 2ND INTERNATIONAL CONFERENCE ON POWER, CONTROL AND EMBEDDED SYSTEMS (ICPCES 2012), 2012,
  • [27] FinFET Technology : As A Promising Alternatives for Conventional MOSFET Technology
    Jain, Prashant U.
    Tomar, V. K.
    2020 INTERNATIONAL CONFERENCE ON EMERGING SMART COMPUTING AND INFORMATICS (ESCI), 2020, : 43 - 47
  • [28] New Contact Metallization Scheme for FinFET and Beyond
    Koike, Junichi
    Hosseini, Maryamsadat
    Ando, Daisuke
    Sutou, Yuji
    2018 IEEE 2ND ELECTRON DEVICES TECHNOLOGY AND MANUFACTURING CONFERENCE (EDTM 2018), 2018, : 169 - 171
  • [29] BARC OPEN IN FINFET TECHNOLOGY NODE
    Tang, Long-Juan
    Han, Qiu-Hua
    Zhang, Hai-Yang
    2017 CHINA SEMICONDUCTOR TECHNOLOGY INTERNATIONAL CONFERENCE (CSTIC 2017), 2017,
  • [30] Advanced CMOS Scaling, And FinFET Technology
    Nowak, E. J.
    SIGE, GE, AND RELATED COMPOUNDS 5: MATERIALS, PROCESSING, AND DEVICES, 2012, 50 (09): : 3 - 16